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SDLS021D May 1990 – April 2016 SN74LS07

PRODUCTION DATA.

封裝選項(xiàng)

請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機(jī)械數(shù)據(jù) (封裝 | 引腳)

D|14
DB|14
N|14
NS|14

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
V_CC	Supply voltage		7	V
V_I	Input voltage⁽²⁾		7	V
V_O	Output voltage⁽²⁾⁽³⁾		30	V
T_J	Operating virtual junction temperature		150	°C
T_stg	Storage temperature	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to GND.

(3) This is the maximum voltage that should be applied to any output when it is in the off state.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1000	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	NOM	MAX	UNIT
V_CC	Supply voltage	4.75	5	5.25	V
V_IH	High-level input voltage	2			V
V_IL	Low-level input voltage			0.8	V
V_OH	High-level output voltage			30	V
I_OL	Low-level output current			40	mA
T_A	Operating free-air temperature	0		70	°C

(1) All unused inputs of the device must be held at V_CC or GND to ensure proper device operation. See the TI application report, Implications of Slow or Floating CMOS Inputs, SCBA004.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		SN74LS07				UNIT
		D (SOIC)	DB (SSOP)	N (PDIP)	NS (SO)
		14 PINS	14 PINS	14 PINS	14 PINS
R_θJA	Junction-to-ambient thermal resistance	85.2	97.4	50.2	82.8	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	43.5	49.8	37.5	40.9	°C/W
R_θJB	Junction-to-board thermal resistance	39.7	44.5	30	41.4	°C/W
ψ_JT	Junction-to-top characterization parameter	10.9	16.5	22.3	12.4	°C/W
ψ_JB	Junction-to-board characterization parameter	39.4	44	29.9	41.1	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER	TEST CONDITIONS⁽¹⁾		MAX	UNIT
V_IK	V_CC = MIN, I_I= –12 mA		–1.5	V
I_OH	V_CC = MIN, V_IH = 2 V	V_OH = 30 V	0.25	mA
V_OL	V_CC = MIN, V_IL = 0.8 V	I_OL = 16 mA	0.4	V
V_OL	V_CC = MIN, V_IL = 0.8 V	I_OL= MAX⁽²⁾	0.7	V
I_I	V_CC = MAX, V_I = 7 V		1	mA
I_IH	V_CC = MAX, V_I= 2.4 V		20	µA
I_IL	V_CC= MAX, V_I= 0.4 V		–0.2	mA
I_CCH	V_CC = MAX		14	mA
I_CCL	V_CC = MAX		45	mA

(1) For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

(2) I_OL = 40 mA

6.6 Switching Characteristics

V_CC = 5 V, T_A = 25°C (see Figure 2)

PARAMETER	FROM (INPUT)	TO (OUTPUT)	TEST CONDITIONS		MIN	TYP	MAX	UNIT
t_PLH	A	Y	R_L= 110 Ω, C_L = 15 pF			6	10	ns
t_PHL	A	Y	R_L= 110 Ω, C_L = 15 pF			19	30	ns

6.7 Typical Characteristics

Figure 1. t_PLH vs. Temperature