ZHCSQ37F December 1982 – February 2022 SN54HC4020 , SN74HC4020
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 ?, tt < 6 ns.
For clock inputs, fmax is measured when the input duty cycle is 50%.
The outputs are measured one at a time with one input transition per measurement.

Figure 6-2 Voltage Waveforms,
Standard CMOS Inputs Pulse Duration
Figure 6-3 Voltage Waveforms,
Standard CMOS Inputs Setup and Hold Times