ZHCSSW4F November 1995 – February 2024 SN74AC564
PRODMIX
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Figure 3-1 SN74AC564 DB, DW, N, NS,
or PW Package (Top View)| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| OE | 1 | Input | Output enable for all channels, active low |
| D1 | 2 | Input | Input for channel 1 |
| D2 | 3 | Input | Input for channel 2 |
| D3 | 4 | Input | Input for channel 3 |
| D4 | 5 | Input | Input for channel 4 |
| D5 | 6 | Input | Input for channel 5 |
| D6 | 7 | Input | Input for channel 6 |
| D7 | 8 | Input | Input for channel 7 |
| D8 | 9 | Input | Input for channel 8 |
| GND | 10 | — | Ground |
| CLK | 11 | Input | Clock input for all channels, rising edge triggered |
| Q8 | 12 | Output | Output for channel 8 |
| Q7 | 13 | Output | Output for channel 7 |
| Q6 | 14 | Output | Output for channel 6 |
| Q5 | 15 | Output | Output for channel 5 |
| Q4 | 16 | Output | Output for channel 4 |
| Q3 | 17 | Output | Output for channel 3 |
| Q2 | 18 | Output | Output for channel 2 |
| Q1 | 19 | Output | Output for channel 1 |
| VCC | 20 | — | Positive supply |