SLLS994B February 2010 – July 2015 SN65HVDA1050A-Q1
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- D|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
5 Pin Configuration and Functions
D Package
8-Pin SOIC
Top View
Pin Functions
| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| 1 | TXD | I | CAN transmit data input (low for dominant bus state, high for recessive bus state) |
| 2 | GND | GND | Ground connection |
| 3 | VCC | Supply | Transceiver 5-V supply voltage input |
| 4 | RXD | O | CAN receiver data output (low in dominant bus state, high in recessive bus state) |
| 5 | SPLIT (VREF) | O | Common-mode stabilization output for split termination |
| 6 | CANL | I/O | LOW-level CAN bus line |
| 7 | CANH | I/O | HIGH-level CAN bus line |
| 8 | S | I | Silent mode select pin (active-high) |