ZHCSFG5A September 2016 – November 2016 SN65HVD233-Q1 , SN65HVD234-Q1 , SN65HVD235-Q1
PRODUCTION DATA.
| MIN | MAX | UNIT | ||||
|---|---|---|---|---|---|---|
| VCC | Supply voltage | –0.3 | 7 | V | ||
| Voltage at any bus terminal (CANH or CANL) | –36 | 36 | V | |||
| Voltage input, transient pulse, CANH and CANL, through 100 Ω (see Figure 18) | –100 | 100 | V | |||
| VI | Input voltage, (AB, EN, LBK, RS, TXD) | –0.5 | 7 | V | ||
| VO | Output voltage (RXD) | –0.5 | 7 | V | ||
| IO | Receiver output current | –10 | 10 | mA | ||
| TJ | Operating junction temperature | –40 | 150 | °C | ||
| Tstg | Storage temperature | 125 | °C | |||
| VALUE | UNIT | ||||
|---|---|---|---|---|---|
| V(ESD) | Electrostatic discharge | Human-body model (HBM), per AEC Q100-002(1) | CANH, CANL to GND | ±12 000 | V |
| Between CANH and CANL | ±16 000 | ||||
| All pins | ±3 000 | ||||
| Charged-device model (CDM), per AEC Q100-011 | ±1 000 | ||||
| MIN | MAX | UNIT | |||
|---|---|---|---|---|---|
| VCC | Supply voltage | 3 | 3.6 | V | |
| Voltage at any bus terminal (separately or common mode) | –7 | 12 | V | ||
| VIH | High-level input voltage | EN, AB, LBK, TXD | 2 | 5.5 | V |
| VIL | Low-level input voltage | EN, AB, LBK, TXD | 0 | 0.8 | V |
| VID | Differential input voltage between CANH and CANL | –6 | 6 | V | |
| Resistance from RS to ground | 0 | 100 | kΩ | ||
| VI(Rs) | Input voltage at RS for standby | 0.75 VCC | 5.5 | V | |
| IOH | High-level output current | Driver | –50 | mA | |
| Receiver | –10 | ||||
| IOL | Low-level output current | Driver | 50 | mA | |
| Receiver | 10 | ||||
| TA | Operating ambient temperature(1) | –40 | 125 | °C | |
| THERMAL METRIC(1) | SN65HVD23x-Q1 | UNIT | |
|---|---|---|---|
| D (SOIC) | |||
| 8 PINS | |||
| RθJA | Junction-to-ambient thermal resistance | 102.8 | °C/W |
| RθJC(top) | Junction-to-case (top) thermal resistance | 45.1 | °C/W |
| RθJB | Junction-to-board thermal resistance | 43.8 | °C/W |
| ψJT | Junction-to-top characterization parameter | 7.3 | °C/W |
| ψJB | Junction-to-board characterization parameter | 43.2 | °C/W |
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| VO(D) | Bus output voltage (dominant) | CANH | TXD at 0 V, RS at 0 V, see Figure 12 and Figure 13 | 2.45 | VCC | V | ||
| CANL | 0.5 | 1.25 | ||||||
| VO | Bus output voltage (recessive) | CANH | TXD at 3 V, RS at 0 V, see Figure 12 and Figure 13 | 2.3 | V | |||
| CANL | 2.3 | |||||||
| VOD(D) | Differential output voltage (dominant) | TXD at 0 V, RS at 0 V, see Figure 12 and Figure 13 | 1.5 | 2 | 3 | V | ||
| TXD at 0 V, RS at 0 V, see Figure 13 and Figure 14 | 1.2 | 2 | 3 | |||||
| VOD | Differential output voltage (recessive) | TXD at 3 V, RS at 0 V, see Figure 12 and Figure 13 | –120 | 12 | mV | |||
| TXD at 3 V, RS at 0 V, no load | –0.5 | 0.05 | V | |||||
| VOC(pp) | Peak-to-peak common-mode output voltage | See Figure 21 | 1 | V | ||||
| IIH | High-level input current | AB, EN, LBK, TXD | TXD = 2 V or EN = 2 V or LBK = 2 V or AB = 2 V | –30 | 30 | μA | ||
| IIL | Low-level input current | AB, EN, LBK, TXD | TXD = 0.8 V or EN = 0.8 V or LBK = 0.8 V or AB = 0.8 V | –30 | 30 | μA | ||
| IOS | Short-circuit output current | VCANH = –7 V, CANL open, see Figure 26 | –250 | mA | ||||
| VCANH = 12 V, CANL open, see Figure 26 | 1 | |||||||
| VCANL = –7 V, CANH open, see Figure 26 | –1 | |||||||
| VCANL = 12 V, CANH open, see Figure 26 | 250 | |||||||
| CO | Output capacitance | See CI, Input capacitance in Electrical Characteristics: Receiver | ||||||
| IIRs(s) | RS input current for standby | RS at 0.75 VCC | –10 | μA | ||||
| ICC | Supply current | Sleep | EN at 0 V, TXD at VCC, RS at 0 V or VCC | 0.05 | 2 | μA | ||
| Standby | RS at VCC, TXD at VCC, AB at 0 V, LBK at 0 V, EN at VCC |
200 | 600 | |||||
| Dominant | TXD at 0 V, no load, AB at 0 V, LBK at 0 V, RS at 0 V, EN at VCC |
6 | mA | |||||
| Recessive | TXD at VCC, no load, AB at 0 V, LBK at 0 V, RS at 0 V, EN at VCC |
6 | ||||||
| P(AVG) | Average power dissipation | RL = 60 Ω, RS at 0 V, input to D a 1-MHz 50% duty cycle square wave VCC at 3.3 V, TA = 25°C |
36.4 | mW | ||||
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |||
|---|---|---|---|---|---|---|---|---|
| VIT+ | Positive-going input threshold voltage | AB at 0 V, LBK at 0 V, EN at VCC, see Table 1 | 750 | 900 | mV | |||
| VIT– | Negative-going input threshold voltage | 500 | 650 | mV | ||||
| Vhys | Hysteresis voltage (VIT+ – VIT–) | 100 | mV | |||||
| VOH | High-level output voltage | IO = –4 mA, See Figure 17 | 0.8 × VCC | V | ||||
| VOL | Low-level output voltage | IO = 4 mA, See Figure 17 | 0.4 | V | ||||
| II | Bus input current | CANH or CANL at 12 V | Other bus pin at 0 V, TXD at 3 V, AB at 0 V, LBK at 0 V, RS at 0 V, EN at VCC |
150 | 500 | μA | ||
| CANH or CANL at 12 V, VCC at 0 V |
200 | 600 | ||||||
| CANH or CANL at –7 V | –610 | –150 | ||||||
| CANH or CANL at –7 V, VCC at 0 V |
–450 | –130 | ||||||
| CI | Input capacitance (CANH or CANL) | Pin-to-ground, VI = 0.4 sin (4E6πt) + 0.5 V, TXD at 3 V, AB at 0 V, LBK at 0 V, EN at VCC |
40 | pF | ||||
| CID | Differential input capacitance | Pin-to-pin, VI = 0.4 sin (4E6πt) + 0.5 V, TXD at 3 V, AB at 0 V, LBK at 0 V, EN at VCC |
20 | pF | ||||
| RID | Differential input resistance | TXD at 3 V, AB at 0 V, LBK at 0 V, EN at VCC | 40 | 100 | kΩ | |||
| RIN | Input resistance (CANH or CANL) to ground | 20 | 50 | kΩ | ||||
| ICC | Supply current | Sleep | EN at 0 V, TXD at VCC, RS at 0 V or VCC | 0.05 | 2 | μA | ||
| Standby | RS at VCC, TXD at VCC, AB at 0 V, LBK at 0 V, EN at VCC | 200 | 600 | |||||
| Dominant | TXD at 0 V, no load, RS at 0 V, LBK at 0 V, AB at 0 V, EN at VCC |
6 | mA | |||||
| Recessive | TXD at VCC, no load, RS at 0 V, LBK at 0 V, AB at 0 V, EN at VCC |
6 | ||||||
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tPLH | Propagation delay time, low-to-high-level output |
RS at 0 V, see Figure 15 | 35 | 85 | ns | |
| RS with 10 kΩ to ground, see Figure 15 | 70 | 125 | ||||
| RS with 100 kΩ to ground, see Figure 15 | 500 | 870 | ||||
| tPHL | Propagation delay time, high-to-low-level output |
RS at 0 V, see Figure 15 | 70 | 120 | ns | |
| RS with 10 kΩ to ground, see Figure 15 | 130 | 180 | ||||
| RS with 100 kΩ to ground, see Figure 15 | 870 | 1200 | ||||
| tsk(p) | Pulse skew (|tPHL – tPLH|) | RS at 0 V, see Figure 15 | 35 | ns | ||
| RS with 10 kΩ to ground, see Figure 15 | 60 | |||||
| RS with 100 kΩ to ground, see Figure 15 | 370 | |||||
| tr | Differential output signal rise time | RS at 0 V, see Figure 15 | 20 | 70 | ns | |
| RS with 10 kΩ to ground, see Figure 15 | 30 | 135 | ||||
| RS with 100 kΩ to ground, see Figure 15 | 350 | 1400 | ||||
| tf | Differential output signal fall time | RS at 0 V, see Figure 15 | 20 | 70 | ns | |
| RS with 10 kΩ to ground, see Figure 15 | 30 | 135 | ||||
| RS with 100 kΩ to ground, see Figure 15 | 350 | 1400 | ||||
| ten(s) | Enable time from standby to dominant | See Figure 19 and Figure 20 | 0.6 | 1.5 | μs | |
| ten(z) | Enable time from sleep to dominant | 1 | 5 | μs | ||
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | |
|---|---|---|---|---|---|---|
| tPLH | Propagation delay time, CANH input low to RXD output high | See Figure 17 | 35 | 60 | ns | |
| tPHL | Propagation delay time, CANH input high to RXD output low | 35 | 60 | ns | ||
| tsk(p) | Pulse skew (|tPHL – tPLH|) | 7 | ns | |||
| tr | Output signal rise time | 2 | 5 | ns | ||
| tf | Output signal fall time | 2 | 5 | ns | ||
| PARAMETER | TEST CONDITIONS | MIN | TYP(1) | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| t(LBK) | Loopback delay, driver input to receiver output | 'HVD233-Q1 | See Figure 23 | 7.5 | 12 | ns | |
| t(AB1) | Loopback delay, driver input to receiver output | 'HVD235-Q1 | See Figure 24 | 10 | 20 | ns | |
| t(AB2) | Loopback delay, bus input to receiver output |
See Figure 25 | 35 | 60 | ns | ||
| t(loop1) | Total loop delay, driver input to receiver output, recessive to dominant | RS at 0 V, see Figure 22 | 70 | 135 | ns | ||
| RS with 10 kΩ to ground, see Figure 22 | 105 | 190 | |||||
| RS with 100 kΩ to ground, see Figure 22 | 535 | 1000 | |||||
| t(loop2) | Total loop delay, driver input to receiver output, dominant to recessive | RS at 0 V, see Figure 22 | 70 | 135 | ns | ||
| RS with 10 kΩ to ground, see Figure 22 | 105 | 190 | |||||
| RS with 100 kΩ to ground, see Figure 22 | 535 | 1000 | |||||
| VCC = 3.3 V | TA = 25°C | RL = 60-Ω Load |
| VCC = 3.3 V | TA = 25°C |
| TA = 25°C | RL = 60 Ω |
| VCC = 3.3 V | TA = 25°C |
| RL = 60 Ω |