ZHCSDL3O MARCH 2001 – April 2018 SN65HVD230 , SN65HVD231 , SN65HVD232
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 修訂歷史記錄
- 5 說(shuō)明 （續(xù)）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
-
8 Specifications
- 8.1 Absolute Maximum Ratings
- 8.2 ESD Ratings
- 8.3 Recommended Operating Conditions
- 8.4 Thermal Information
- 8.5 Electrical Characteristics: Driver
- 8.6 Electrical Characteristics: Receiver
- 8.7 Switching Characteristics: Driver
- 8.8 Switching Characteristics: Receiver
- 8.9 Switching Characteristics: Device
- 8.10 Device Control-Pin Characteristics
- 8.11 Typical Characteristics
- 9 Parameter Measurement Information
- 10Detailed Description
- 11Application and Implementation
- 12Power Supply Recommendations
- 13Layout
- 14器件和文檔支持
- 15機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- D|8
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
11.1.1 CAN Bus States
The CAN bus has two states during powered operation of the device; dominant and recessive. A dominant bus state is when the bus is driven differentially, corresponding to a logic low on the D and R pin. A recessive bus state is when the bus is biased to VCC / 2 via the high-resistance internal resistors RI and RDiff of the receiver, corresponding to a logic high on the D and R pins. See Figure 34 and Figure 35.
Figure 35. Simplified Recessive Common Mode Bias and Receiver