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SDLS146B October 1976 – September 2016 SN54LS245 , SN74LS245

請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

7 Specifications

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_CC	Supply voltage		7	V
V_I	Input voltage⁽¹⁾		7	V
T_J	Operating virtual junction temperature		150	°C
T_stg	Storage temperature	–65	150	°C

(1) All voltage values are with respect to GND.

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2500	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±1500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

			MIN	NOM	MAX	UNIT
V_CC	Supply voltage	SN54LS245	4.5	5	5.5	V
V_CC	Supply voltage	SN74LS245	4.75	5	5.25	V
I_OH	High-level output current	SN54LS245			–12	mA
I_OH	High-level output current	SN74LS245			–15	mA
I_OL	Low-level output current	SN54LS245			12	mA
I_OL	Low-level output current	SN74LS245			24	mA
T_A	Operating free-air temperature	SN54LS245	–55		125	°C
T_A	Operating free-air temperature	SN74LS245	0		70	°C

THERMAL METRIC⁽¹⁾		SNx4LS245							UNIT
		J (CDIP)	W (CFP)	FK (LCCC)	DB (SSOP)	DW (SOIC)	N (PDIP)	NS (SO)
		20 PINS	20 PINS	20 PINS	20 PINS	20 PINS	20 PINS	20 PINS
R_θJA	Junction-to-ambient thermal resistance	N/A	N/A	N/A	91.7	79.0	46.1	74.2	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	42.3⁽²⁾	70.1⁽²⁾	46.7⁽²⁾	53.1	44.4	32.1	40.4	°C/W
R_θJB	Junction-to-board thermal resistance	56.9⁽²⁾	109.5⁽²⁾	45.6⁽²⁾	46.8	46.9	27.0	41.7	°C/W
ψ_JT	Junction-to-top characterization parameter	N/A	N/A	N/A	18.9	18.0	17.6	16.9	°C/W
ψ_JB	Junction-to-board characterization parameter	N/A	N/A	N/A	46.4	46.3	26.9	41.3	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	15.9⁽²⁾	13.0⁽²⁾	6.7⁽²⁾	N/A	N/A	N/A	N/A	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

(2) MIL-STD-883 for Rth-JCx JEDEC JESD51 for Rth-JB (body not contact PCB)

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER			TEST CONDITIONS⁽¹⁾			MIN	TYP⁽¹⁾	MAX	UNIT
V_IH	High-level input voltage					2			V
V_IL	Low-level input voltage			SN54LS245				0.7	V
V_IL	Low-level input voltage			SN74LS245				0.8	V
V_IK	Input clamp voltage		V_CC = MIN,	I_I = –18 mA				–1.5	V
	Hysteresis (V_T+ – V_T–)	A or B	V_CC= MIN			0.2	0.4		V
V_OH	High-level output voltage		V_CC= MIN, V_IL = V_IL(max) V_IH = 2 V,	I_OH = –3 mA		2.4	3.4		V
V_OH	High-level output voltage		V_CC= MIN, V_IL = V_IL(max) V_IH = 2 V,	I_OH = MAX		2			V
V_OL	Low-level output voltage		V_CC = MIN, V_IH = 2 V, V_IL = V_IL(max)	I_OL = 12 mA				0.4	V
V_OL	Low-level output voltage		V_CC = MIN, V_IH = 2 V, V_IL = V_IL(max)	I_OL = 24 mA	SN74LS245			0.5	V
I_OZH	Off-state output current, high-level voltage applied		V_CC = MAX, OE at 2 V	V_O = 2.7 V				20	µA
I_OZL	Off-state output current, low-level voltage applied		V_CC = MAX, OE at 2 V	V_O = 0.4 V				–200	µA
I_I	Input current at maximum input voltage	A or B	V_CC= MAX	V_I = 5.5 V				0.1	mA
I_I	Input current at maximum input voltage	DIR or OE	V_CC= MAX	V_I = 7 V				0.1	mA
I_IH	High-level input current		V_CC = MAX,	V_IH = 2.7 V				20	µA
I_IL	Low-level input current		V_CC = MAX,	V_IL = 0.4 V				–0.2	mA
I_OS	Short-circuit output current⁽²⁾		V_CC = MAX			–40		–225	mA
I_CC	Supply current	Total, outputs high	V_CC = MAX	Outputs open			48	70	mA
		Total, outputs low					62	90
		Outputs at high Z					64	95

(1) All typical values are at V_CC = 5 V, T_A = 25°C.

(2) Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.

V_CC = 5 V, T_A = 25°C (see Figure 2)

PARAMETER		TEST CONDITIONS	TYP	MAX	UNIT
t_PLH	Propagation delay time, low- to high-level output	C_L = 45 pF, R_L = 667 Ω	8	12	ns
t_PHL	Propagation delay time, high- to low-level output	C_L = 45 pF, R_L = 667 Ω	8	12	ns
t_PZL	Output enable time to low level	C_L= 45 pF, R_L = 667 Ω	27	40	ns
t_PZH	Output enable time to high level	C_L= 45 pF, R_L = 667 Ω	25	40	ns
t_PLZ	Output disable time from low level	C_L = 5 pF, R_L = 667 Ω	15	25	ns
t_PHZ	Output disable time from high level	C_L = 5 pF, R_L = 667 Ω	15	28	ns

V_CC = 5 V, T_A = 25°C, C_L = 45 pF, R_L = 667 Ω

Figure 1. Simulated Propagation Delay From Input to Output