SBAS452A September 2008 – January 2016 PCM3168A
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Description (continued)
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
-
8 Specifications
- 8.1 Absolute Maximum Ratings
- 8.2 ESD Ratings
- 8.3 Recommended Operating Conditions
- 8.4 Thermal Information
- 8.5 Electrical Characteristics
- 8.6 Timing Requirements: System Clock
- 8.7 Timing Requirements: Power-On Reset
- 8.8 Timing Requirements: Audio Interface for Left-Justified, Right-Justified, and I2S (Slave Mode)
- 8.9 Timing Requirements: Audio Interface for Left-Justified, Right-Justified, and I2S (Master Mode)
- 8.10 Timing Requirements: Audio Interface for DSP and TDM (Slave Mode)
- 8.11 Timing Requirements: Audio Interface for DSP and TDM (Master Mode)
- 8.12 Timing Requirements: DAC Outputs and ADC Outputs
- 8.13 Timing Requirements: Four-Wire Serial Control Interface
- 8.14 Timing Requirements: SCL and SDA Control Interface
- 8.15 Typical Characteristics
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9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Analog Inputs
- 9.3.2 Analog Outputs
- 9.3.3 Voltage References
- 9.3.4 System Clock Input
- 9.3.5 Sampling Mode
- 9.3.6 Reset Operation
- 9.3.7 Highpass Filter (HPF)
- 9.3.8 Overflow Flag
- 9.3.9 Zero Flag
- 9.3.10 Four-Wire (SPI) Serial Control
- 9.3.11 Control Data Word Format
- 9.3.12 Register Write Operation
- 9.3.13 Register Read Operation
- 9.3.14 Two-Wire (I2C) Serial Control
- 9.3.15 Packet Protocol
- 9.3.16 Write Operation
- 9.3.17 Read Operation
- 9.4 Device Functional Modes
- 9.5 Register Maps
- 10Application and Implementation
- 11Power Supply Recommendations
-
12Layout
- 12.1
Layout Guidelines
- 12.1.1 Power-Supply Pins (VCCAD1/2, VCCDA1/2, and VDD1/2)
- 12.1.2 Grounding (AGNDAD1/2, AGNDDA1/2, and DGND1/2)
- 12.1.3 VIN1±, VIN2±, VIN3±, VIN4±, VIN5±, and VIN6± Pins
- 12.1.4 VCOMAD and VCOMDA Pins
- 12.1.5 VREFAD1/2 Pins
- 12.1.6 VOUT1±, VOU2±, VOUT3±, VOUT4±, VOUT5±, VOUT6±, VOUT7±, and VOUT8± Pins
- 12.1.7 MODE Pin
- 12.1.8 RST Pin
- 12.1.9 OVF Pin
- 12.1.10 System Clock and Audio Interface Clocks
- 12.1.11 PowerPAD
- 12.1.12 External Mute Control
- 12.2 Layout Example
- 12.1
Layout Guidelines
- 13Device and Documentation Support
- 14Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- PAP|64
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- PAP|64
訂購信息
13 Device and Documentation Support
13.1 Device Support
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 Documentation Support
13.3 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.
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TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.
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Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support.
13.4 Trademarks
E2E is a trademark of Texas Instruments.
SPI is a trademark of Motorola.
I2C, I2S are trademarks of NXP Semiconductors.
PowerPAD is a trademark of Texas Instruments Incorporated.
All other trademarks are the property of their respective owners.
13.5 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.