ZHCSIR8F August 2009 – September 2018 MSP430F5418 , MSP430F5419 , MSP430F5435 , MSP430F5436 , MSP430F5437 , MSP430F5438
PRODUCTION DATA.
Table 4-1 describes the signals for all device variants and package options.
| TERMINAL | I/O(1) | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | NO. | |||
| PZ | PN | |||
| P6.4/A4 | 1 | 1 | I/O | General-purpose digital I/O |
| Analog input A4 for ADC | ||||
| P6.5/A5 | 2 | 2 | I/O | General-purpose digital I/O |
| Analog input A5 for ADC | ||||
| P6.6/A6 | 3 | 3 | I/O | General-purpose digital I/O |
| Analog input A6 for ADC | ||||
| P6.7/A7 | 4 | 4 | I/O | General-purpose digital I/O |
| Analog input A7 for ADC | ||||
| P7.4/A12 | 5 | 5 | I/O | General-purpose digital I/O |
| Analog input A12 for ADC | ||||
| P7.5/A13 | 6 | 6 | I/O | General-purpose digital I/O |
| Analog input A13 for ADC | ||||
| P7.6/A14 | 7 | 7 | I/O | General-purpose digital I/O |
| Analog input A14 for ADC | ||||
| P7.7/A15 | 8 | 8 | I/O | General-purpose digital I/O |
| Analog input A15 for ADC | ||||
| P5.0/A8/VREF+/VeREF+ | 9 | 9 | I/O | General-purpose digital I/O |
| Analog input A8 for ADC | ||||
| Output of reference voltage to the ADC | ||||
| Input for an external reference voltage to the ADC | ||||
| P5.1/A9/VREF-/VeREF- | 10 | 10 | I/O | General-purpose digital I/O |
| Analog input A9 for ADC | ||||
| Negative terminal for the ADC reference voltage for the internal reference voltage | ||||
| Negative terminal for the ADC reference voltage for an external applied reference voltage | ||||
| AVCC | 11 | 11 | Analog power supply | |
| AVSS | 12 | 12 | Analog ground supply | |
| P7.0/XIN | 13 | 13 | I/O | General-purpose digital I/O |
| Input terminal for crystal oscillator XT1 | ||||
| P7.1/XOUT | 14 | 14 | I/O | General-purpose digital I/O |
| Output terminal of crystal oscillator XT1 | ||||
| DVSS1 | 15 | 15 | Digital ground supply | |
| DVCC1 | 16 | 16 | Digital power supply | |
| P1.0/TA0CLK/ACLK | 17 | 17 | I/O | General-purpose digital I/O with port interrupt |
| TA0 clock signal TACLK input | ||||
| ACLK output (divided by 1, 2, 4, 8, 16, or 32) | ||||
| P1.1/TA0.0 | 18 | 18 | I/O | General-purpose digital I/O with port interrupt |
| TA0 CCR0 capture: CCI0A input, compare: Out0 output | ||||
| BSL transmit output | ||||
| P1.2/TA0.1 | 19 | 19 | I/O | General-purpose digital I/O with port interrupt |
| TA0 CCR1 capture: CCI1A input, compare: Out1 output | ||||
| BSL receive input | ||||
| P1.3/TA0.2 | 20 | 20 | I/O | General-purpose digital I/O with port interrupt |
| TA0 CCR2 capture: CCI2A input, compare: Out2 output | ||||
| P1.4/TA0.3 | 21 | 21 | I/O | General-purpose digital I/O with port interrupt |
| TA0 CCR3 capture: CCI3A input compare: Out3 output | ||||
| P1.5/TA0.4 | 22 | 22 | I/O | General-purpose digital I/O with port interrupt |
| TA0 CCR4 capture: CCI4A input, compare: Out4 output | ||||
| P1.6/SMCLK | 23 | 23 | I/O | General-purpose digital I/O with port interrupt |
| SMCLK output | ||||
| P1.7 | 24 | 24 | I/O | General-purpose digital I/O with port interrupt |
| P2.0/TA1CLK/MCLK | 25 | 25 | I/O | General-purpose digital I/O with port interrupt |
| TA1 clock signal TA1CLK input | ||||
| MCLK output | ||||
| P2.1/TA1.0 | 26 | 26 | I/O | General-purpose digital I/O with port interrupt |
| TA1 CCR0 capture: CCI0A input, compare: Out0 output | ||||
| P2.2/TA1.1 | 27 | 27 | I/O | General-purpose digital I/O with port interrupt |
| TA1 CCR1 capture: CCI1A input, compare: Out1 output | ||||
| P2.3/TA1.2 | 28 | 28 | I/O | General-purpose digital I/O with port interrupt |
| TA1 CCR2 capture: CCI2A input, compare: Out2 output | ||||
| P2.4/RTCCLK | 29 | 29 | I/O | General-purpose digital I/O with port interrupt |
| RTCCLK output | ||||
| P2.5 | 30 | 32 | I/O | General-purpose digital I/O with port interrupt |
| P2.6/ACLK | 31 | 33 | I/O | General-purpose digital I/O with port interrupt |
| ACLK output (divided by 1, 2, 4, 8, 16, or 32) | ||||
| P2.7/ADC12CLK/DMAE0 | 32 | 34 | I/O | General-purpose digital I/O with port interrupt |
| Conversion clock output for ADC | ||||
| DMA external trigger input | ||||
| P3.0/UCB0STE/UCA0CLK | 33 | 35 | I/O | General-purpose digital I/O |
| Slave transmit enable – USCI_B0 SPI mode | ||||
| Clock signal input – USCI_A0 SPI slave mode | ||||
| Clock signal output – USCI_A0 SPI master mode | ||||
| P3.1/UCB0SIMO/UCB0SDA | 34 | 36 | I/O | General-purpose digital I/O |
| Slave in, master out – USCI_B0 SPI mode | ||||
| I2C data – USCI_B0 I2C mode | ||||
| P3.2/UCB0SOMI/UCB0SCL | 35 | 37 | I/O | General-purpose digital I/O |
| Slave out, master in – USCI_B0 SPI mode | ||||
| I2C clock – USCI_B0 I2C mode | ||||
| P3.3/UCB0CLK/UCA0STE | 36 | 38 | I/O | General-purpose digital I/O |
| Clock signal input – USCI_B0 SPI slave mode | ||||
| Clock signal output – USCI_B0 SPI master mode | ||||
| Slave transmit enable – USCI_A0 SPI mode | ||||
| DVSS3 | 37 | 30 | Digital ground supply | |
| DVCC3 | 38 | 31 | Digital power supply | |
| P3.4/UCA0TXD/UCA0SIMO | 39 | 39 | I/O | General-purpose digital I/O |
| Transmit data – USCI_A0 UART mode | ||||
| Slave in, master out – USCI_A0 SPI mode | ||||
| P3.5/UCA0RXD/UCA0SOMI | 40 | 40 | I/O | General-purpose digital I/O |
| Receive data – USCI_A0 UART mode | ||||
| Slave out, master in – USCI_A0 SPI mode | ||||
| P3.6/UCB1STE/UCA1CLK | 41 | 41 | I/O | General-purpose digital I/O |
| Slave transmit enable – USCI_B1 SPI mode | ||||
| Clock signal input – USCI_A1 SPI slave mode | ||||
| Clock signal output – USCI_A1 SPI master mode | ||||
| P3.7/UCB1SIMO/UCB1SDA | 42 | 42 | I/O | General-purpose digital I/O |
| Slave in, master out – USCI_B1 SPI mode | ||||
| I2C data – USCI_B1 I2C mode | ||||
| P4.0/TB0.0 | 43 | 43 | I/O | General-purpose digital I/O |
| TB0 capture CCR0: CCI0A/CCI0B input, compare: Out0 output | ||||
| P4.1/TB0.1 | 44 | 44 | I/O | General-purpose digital I/O |
| TB0 capture CCR1: CCI1A/CCI1B input, compare: Out1 output | ||||
| P4.2/TB0.2 | 45 | 45 | I/O | General-purpose digital I/O |
| TB0 capture CCR2: CCI2A/CCI2B input, compare: Out2 output | ||||
| P4.3/TB0.3 | 46 | 46 | I/O | General-purpose digital I/O |
| TB0 capture CCR3: CCI3A/CCI3B input, compare: Out3 output | ||||
| P4.4/TB0.4 | 47 | 47 | I/O | General-purpose digital I/O |
| TB0 capture CCR4: CCI4A/CCI4B input, compare: Out4 output | ||||
| P4.5/TB0.5 | 48 | 48 | I/O | General-purpose digital I/O |
| TB0 capture CCR5: CCI5A/CCI5B input, compare: Out5 output | ||||
| P4.6/TB0.6 | 49 | 52 | I/O | General-purpose digital I/O |
| TB0 capture CCR6: CCI6A/CCI6B input, compare: Out6 output | ||||
| P4.7/TB0CLK/SMCLK | 50 | 53 | I/O | General-purpose digital I/O |
| TB0 clock input | ||||
| SMCLK output | ||||
| P5.4/UCB1SOMI/UCB1SCL | 51 | 54 | I/O | General-purpose digital I/O |
| Slave out, master in – USCI_B1 SPI mode | ||||
| I2C clock – USCI_B1 I2C mode | ||||
| P5.5/UCB1CLK/UCA1STE | 52 | 55 | I/O | General-purpose digital I/O |
| Clock signal input – USCI_B1 SPI slave mode | ||||
| Clock signal output – USCI_B1 SPI master mode | ||||
| Slave transmit enable – USCI_A1 SPI mode | ||||
| P5.6/UCA1TXD/UCA1SIMO | 53 | 56 | I/O | General-purpose digital I/O |
| Transmit data – USCI_A1 UART mode | ||||
| Slave in, master out – USCI_A1 SPI mode | ||||
| P5.7/UCA1RXD/UCA1SOMI | 54 | 57 | I/O | General-purpose digital I/O |
| Receive data – USCI_A1 UART mode | ||||
| Slave out, master in – USCI_A1 SPI mode | ||||
| P7.2/TB0OUTH/SVMOUT | 55 | 58 | I/O | General-purpose digital I/O |
| Switch all PWM outputs high impedance – Timer TB0 | ||||
| SVM output | ||||
| P7.3/TA1.2 | 56 | 59 | I/O | General-purpose digital I/O |
| TA1 CCR2 capture: CCI2B input, compare: Out2 output | ||||
| P8.0/TA0.0 | 57 | 60 | I/O | General-purpose digital I/O |
| TA0 CCR0 capture: CCI0B input, compare: Out0 output | ||||
| P8.1/TA0.1 | 58 | 61 | I/O | General-purpose digital I/O |
| TA0 CCR1 capture: CCI1B input, compare: Out1 output | ||||
| P8.2/TA0.2 | 59 | 62 | I/O | General-purpose digital I/O |
| TA0 CCR2 capture: CCI2B input, compare: Out2 output | ||||
| P8.3/TA0.3 | 60 | 63 | I/O | General-purpose digital I/O |
| TA0 CCR3 capture: CCI3B input, compare: Out3 output | ||||
| P8.4/TA0.4 | 61 | 64 | I/O | General-purpose digital I/O |
| TA0 CCR4 capture: CCI4B input, compare: Out4 output | ||||
| VCORE(2) | 62 | 49 | Regulated core power supply output (internal use only, no external current loading) | |
| DVSS2 | 63 | 50 | Digital ground supply | |
| DVCC2 | 64 | 51 | Digital power supply | |
| P8.5/TA1.0 | 65 | 65 | I/O | General-purpose digital I/O |
| TA1 CCR0 capture: CCI0B input, compare: Out0 output | ||||
| P8.6/TA1.1 | 66 | 66 | I/O | General-purpose digital I/O |
| TA1 CCR1 capture: CCI1B input, compare: Out1 output | ||||
| P8.7 | 67 | N/A | I/O | General-purpose digital I/O |
| P9.0/UCB2STE/UCA2CLK | 68 | N/A | I/O | General-purpose digital I/O |
| Slave transmit enable – USCI_B2 SPI mode | ||||
| Clock signal input – USCI_A2 SPI slave mode | ||||
| Clock signal output – USCI_A2 SPI master mode | ||||
| P9.1/UCB2SIMO/UCB2SDA | 69 | N/A | I/O | General-purpose digital I/O |
| Slave in, master out – USCI_B2 SPI mode | ||||
| I2C data – USCI_B2 I2C mode | ||||
| P9.2/UCB2SOMI/UCB2SCL | 70 | N/A | I/O | General-purpose digital I/O |
| Slave out, master in – USCI_B2 SPI mode | ||||
| I2C clock – USCI_B2 I2C mode | ||||
| P9.3/UCB2CLK/UCA2STE | 71 | N/A | I/O | General-purpose digital I/O |
| Clock signal input – USCI_B2 SPI slave mode | ||||
| Clock signal output – USCI_B2 SPI master mode | ||||
| Slave transmit enable – USCI_A2 SPI mode | ||||
| P9.4/UCA2TXD/UCA2SIMO | 72 | N/A | I/O | General-purpose digital I/O |
| Transmit data – USCI_A2 UART mode | ||||
| Slave in, master out – USCI_A2 SPI mode | ||||
| P9.5/UCA2RXD/UCA2SOMI | 73 | N/A | I/O | General-purpose digital I/O |
| Receive data – USCI_A2 UART mode | ||||
| Slave out, master in – USCI_A2 SPI mode | ||||
| P9.6 | 74 | N/A | I/O | General-purpose digital I/O |
| P9.7 | 75 | N/A | I/O | General-purpose digital I/O |
| P10.0/UCB3STE/UCA3CLK | 76 | N/A | I/O | General-purpose digital I/O |
| Slave transmit enable – USCI_B3 SPI mode | ||||
| Clock signal input – USCI_A3 SPI slave mode | ||||
| Clock signal output – USCI_A3 SPI master mode | ||||
| P10.1/UCB3SIMO/UCB3SDA | 77 | N/A | I/O | General-purpose digital I/O |
| Slave in, master out – USCI_B3 SPI mode | ||||
| I2C data – USCI_B3 I2C mode | ||||
| P10.2/UCB3SOMI/UCB3SCL | 78 | N/A | I/O | General-purpose digital I/O |
| Slave out, master in – USCI_B3 SPI mode | ||||
| I2C clock – USCI_B3 I2C mode | ||||
| P10.3/UCB3CLK/UCA3STE | 79 | N/A | I/O | General-purpose digital I/O |
| Clock signal input – USCI_B3 SPI slave mode | ||||
| Clock signal output – USCI_B3 SPI master mode | ||||
| Slave transmit enable – USCI_A3 SPI mode | ||||
| P10.4/UCA3TXD/UCA3SIMO | 80 | N/A | I/O | General-purpose digital I/O |
| Transmit data – USCI_A3 UART mode | ||||
| Slave in, master out – USCI_A3 SPI mode | ||||
| P10.5/UCA3RXD/UCA3SOMI | 81 | N/A | I/O | General-purpose digital I/O |
| Receive data – USCI_A3 UART mode | ||||
| Slave out, master in – USCI_A3 SPI mode | ||||
| P10.6 | 82 | N/A | I/O | General-purpose digital I/O |
| P10.7 | 83 | N/A | I/O | General-purpose digital I/O |
| P11.0/ACLK | 84 | N/A | I/O | General-purpose digital I/O |
| ACLK output (divided by 1, 2, 4, 8, 16, or 32) | ||||
| P11.1/MCLK | 85 | N/A | I/O | General-purpose digital I/O |
| MCLK output | ||||
| P11.2/SMCLK | 86 | N/A | I/O | General-purpose digital I/O |
| SMCLK output | ||||
| DVCC4 | 87 | 67 | Digital power supply | |
| DVSS4 | 88 | 68 | Digital ground supply | |
| P5.2/XT2IN | 89 | 69 | I/O | General-purpose digital I/O |
| Input terminal for crystal oscillator XT2 | ||||
| P5.3/XT2OUT | 90 | 70 | I/O | General-purpose digital I/O |
| Output terminal of crystal oscillator XT2 | ||||
| TEST/SBWTCK(3) | 91 | 71 | I | Test mode pin – select digital I/O on JTAG pins |
| Spy-Bi-Wire input clock | ||||
| PJ.0/TDO(4) | 92 | 72 | I/O | General-purpose digital I/O |
| Test data output port | ||||
| PJ.1/TDI/TCLK(4) | 93 | 73 | I/O | General-purpose digital I/O |
| Test data input or test clock input | ||||
| PJ.2/TMS(4) | 94 | 74 | I/O | General-purpose digital I/O |
| Test mode select | ||||
| PJ.3/TCK(4) | 95 | 75 | I/O | General-purpose digital I/O |
| Test clock | ||||
| RST/NMI/SBWTDIO(3) | 96 | 76 | I/O | Reset input active low |
| Nonmaskable interrupt input | ||||
| Spy-Bi-Wire data input/output | ||||
| P6.0/A0 | 97 | 77 | I/O | General-purpose digital I/O |
| Analog input A0 for ADC | ||||
| P6.1/A1 | 98 | 78 | I/O | General-purpose digital I/O |
| Analog input A1 for ADC | ||||
| P6.2/A2 | 99 | 79 | I/O | General-purpose digital I/O |
| Analog input A2 for ADC | ||||
| P6.3/A3 | 100 | 80 | I/O | General-purpose digital I/O |
| Analog input A3 for ADC | ||||
| Reserved | N/A | N/A | ||