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ZHCSPQ7A december 2022 – april 2023 MCT8315A

PRODUCTION DATA

封裝選項

機(jī)械數(shù)據(jù) (封裝 | 引腳)

RGF|40
- MPQF173F

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

RGF|40
- QFND672

訂購信息

7.3.21 Protections

The MCT8315A is protected from a host of fault events including motor lock, VM undervoltage, AVDD undervoltage, buck undervoltage, charge pump undervoltage, overtemperature and overcurrent events. Table 7-2 summarizes the response, recovery modes, power stage status, reporting mechanism for different faults.

Note:

Actionable faults (latched or retry) are always reported on nFAULT pin (as logic low).
Actionable faults (latched or retry) are reported on ALARM pin (as logic high) when ALARM_PIN_EN is set to 1b.
Report only faults are reported on nFAULT (as logic low) only when ALARM_PIN_EN is set to 0b. When ALARM_PIN_EN is set to 1b, report only faults are reported only on ALARM pin (as logic high) while nFAULT stays high (external pull-up).
Priority order for multi-fault scenarios is latched > slower retry time fault > faster retry time fault > report only fault. For example, if a latched and retry fault happen simultaneously, the device stays latched in fault mode until user issues clear fault command by writing 1b to CLR_FLT. If two retry faults with different retry times happen simultaneously, the device retries only after the longer (slower) retry time lapses.
Recovery refers only to state of FETs (Hi-Z or active) after the fault condition is removed. Automatic indicates that the device automatically recovers (and FETs are active) when retry time lapses after the fault condition is removed. Latched indicates that the device waits for clearing of fault condition (by writing 1b to CLR_FLT bit) to make the FETs active again.
Actionable (latched or retry) faults can take up to 200-ms after fault response (FETs in Hi-Z) to be reported on nFAULT pin (as logic low), ALARM pin (as logic high) and fault status registers.
Latched faults can take up to 200-ms after CLR_FLT command is issued (over I²C) to be cleared.

Table 7-2 Fault Action and Response

FAULT	CONDITION	CONFIGURATION	REPORT	FETs	DIGITAL	RECOVERY
VM undervoltage	V_VM < V_UVLO	—	—	Hi-Z	Disabled	Automatic: V_VM > V_UVLO
AVDD undervoltage	V_AVDD < V_{AVDD_UV}	—	—	Hi-Z	Disabled	Automatic: V_AVDD > V_{AVDD_UV}
Buck undervoltage (BUCK_UV)	V_{FB_BK} < V_{BK_UV}	—	—	Active/Hi-Z	Active/Disabled	Automatic: V_{FB_BK} > V_{BK_UV}
Charge pump undervoltage (VCP_UV)	V_CP < V_CPUV	—	nFAULT and GATE_DRIVER_FAULT_STATUS register	Hi-Z	Active	Automatic: V_VCP > V_CPUV
Over Voltage Protection (OVP)	V_VM > V_OVP	OVP_EN = 0b	None	Active	Active	No action
Over Voltage Protection (OVP)	V_VM > V_OVP	OVP_EN = 1b	nFAULT and GATE_DRIVER_FAULT_STATUS register	Hi-Z	Active	Automatic: V_VM < V_OVP
Over Current Protection (OCP)	I_PHASE > I_OCP	OCP_MODE = 00b	nFAULT and GATE_DRIVER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
		OCP_MODE = 01b	nFAULT and GATE_DRIVER_FAULT_STATUS register	Hi-Z	Active	Retry: t_RETRY
		OCP_MODE = 10b	nFAULT and GATE_DRIVER_FAULT_STATUS register	Active	Active	No action
		OCP_MODE = 11b	None	Active	Active	No action
Buck Overcurrent Protection (BUCK_OCP)	I_BK > I_{BK_OCP}	—	—	Hi-Z	Disabled	Automatic
Motor Lock (MTR_LCK )	Motor lock: Abnormal Speed; No Motor Lock; Loss of Sync	MTR_LCK_MODE = 0000b or 0001b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
		MTR_LCK_MODE = 0010b	nFAULT and CONTROLLER_FAULT_STATUS register	High side brake	Active	Latched: CLR_FLT
		MTR_LCK_MODE = 0011b	nFAULT and CONTROLLER_FAULT_STATUS register	Low side brake	Active	Latched: CLR_FLT
		MTR_LCK_MODE = 0100b or 0101b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Retry: t_{LCK_RETRY}
		MTR_LCK_MODE = 0110b	nFAULT and CONTROLLER_FAULT_STATUS register	High side brake	Active	Retry: t_{LCK_RETRY}
		MTR_LCK_MODE = 0111b	nFAULT and CONTROLLER_FAULT_STATUS register	Low side brake	Active	Retry: t_{LCK_RETRY}
		MTR_LCK_MODE = 1000b	nFAULT and CONTROLLER_FAULT_STATUS register	Active	Active	No action
		MTR_LCK_MODE = 1xx1b	None	Active	Active	No action
Cycle by Cycle Current Limit (CBC_ILIMIT)	V_SOX > CBC_ILIMIT	CBC_ILIMIT_MODE = 0000b	nFAULT and CONTROLLER_FAULT_STATUS register	Recirculation	Active	Automatic: Next PWM cycle
		CBC_ILIMIT_MODE = 0001b	None	Recirculation	Active	Automatic: Next PWM cycle
		CBC_ILIMIT_MODE = 0010b	nFAULT and CONTROLLER_FAULT_STATUS register	Recirculation	Active	Automatic: V_SOX < CBC_ILIMIT
		CBC_ILIMIT_MODE = 0011b	None	Recirculation	Active	Automatic: V_SOX < CBC_ILIMIT
		CBC_ILIMIT_MODE = 0100b	nFAULT and CONTROLLER_FAULT_STATUS register	Recirculation	Active	Automatic: PWM cycle > CBC_RETRY_PWM_CYC
		CBC_ILIMIT_MODE = 0101b	None	Recirculation	Active	Automatic: PWM cycle > CBC_RETRY_PWM_CYC
		CBC_ILIMIT_MODE= 0110b	nFAULT and CONTROLLER_FAULT_STATUS register	Active	Active	No action
		CBC_ILIMIT_MODE = 0111b, 1xxxb	None	Active	Active	No action
Lock-Detection Current Limit (LOCK_ILIMIT)	V_SOX > LOCK_ILIMIT	LOCK_ILIMIT_MODE = 0000b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
		LOCK_ILIMIT_MODE = 0001b	nFAULT and CONTROLLER_FAULT_STATUS register	Recirculation	Active	Latched: CLR_FLT
		LOCK_ILIMIT_MODE = 0010b	nFAULT and CONTROLLER_FAULT_STATUS register	High-side brake	Active	Latched: CLR_FLT
		LOCK_ILIMIT_MODE = 0011b	nFAULT and CONTROLLER_FAULT_STATUS register	Low-side brake	Active	Latched: CLR_FLT
		LOCK_ILIMIT_MODE = 0100b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Retry: t_{LCK_RETRY}
		LOCK_ILIMIT_MODE = 0101b	nFAULT and CONTROLLER_FAULT_STATUS register	Recirculation	Active	Retry: t_{LCK_RETRY}
		LOCK_ILIMIT_MODE = 0110b	nFAULT and CONTROLLER_FAULT_STATUS register	High-side brake	Active	Retry: t_{LCK_RETRY}
		LOCK_ILIMIT_MODE = 0111b	nFAULT and CONTROLLER_FAULT_STATUS register	Low-side brake	Active	Retry: t_{LCK_RETRY}
		LOCK_ILIMIT_MODE= 1000b	nFAULT and CONTROLLER_FAULT_STATUS register	Active	Active	No action
		LOCK_ILIMIT_MODE = 1xx1b	None	Active	Active	No action
IPD Timeout Fault (IPD_T1_FAULT and IPD_T2_FAULT)	IPD TIME > 500ms (approx.), during IPD current ramp up or ramp down	IPD_TIMEOUT_FAULT_EN = 0b	—	Active	Active	No action
IPD Timeout Fault (IPD_T1_FAULT and IPD_T2_FAULT)		IPD_TIMEOUT_FAULT_EN = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Retry: t_{LCK_RETRY}
IPD Timeout Fault (IPD_T1_FAULT and IPD_T2_FAULT)	IPD TIME > 500ms (approx.), during IPD current ramp up or ramp down	—	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
IPD Frequency Fault (IPD_FREQ_FAULT)	IPD pulse before the current decay in previous IPD pulse	IPD_FREQ_FAULT_EN = 0b	—	Active	Active	No action
IPD Frequency Fault (IPD_FREQ_FAULT)	IPD pulse before the current decay in previous IPD pulse	IPD_FREQ_FAULT_EN = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Retry: t_{LCK_RETRY}
IPD Frequency Fault (IPD_FREQ_FAULT)	IPD pulse before the current decay in previous IPD pulse	—	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
Maximum VM (overvoltage) fault	V_VM > MAX_VM_MOTOR, if MAX_VM_MOTOR ≠ 000b	MAX_VM_MODE = 0b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
Maximum VM (overvoltage) fault	V_VM > MAX_VM_MOTOR, if MAX_VM_MOTOR ≠ 000b	MAX_VM_MODE = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Automatic: (V_VM < MAX_VM_MOTOR - 1)-V
Minimum VM (undervoltage) fault	V_VM < MIN_VM_MOTOR, if MIN_VM_MOTOR ≠ 000b	MIN_VM_MODE = 0b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
Minimum VM (undervoltage) fault	V_VM < MIN_VM_MOTOR, if MIN_VM_MOTOR ≠ 000b	MIN_VM_MODE = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Automatic: (V_VM > MIN_VM_MOTOR + 0.5)-V
External Watchdog	Watchdog tickle does not arrive before configured time interval when EXT_WDT_EN =1b. Refer Section 7.5.5	EXT_WDT_FAULT_MODE = 0b	nFAULT and CONTROLLER_FAULT_STATUS register	Active	Active	No action
External Watchdog		EXT_WDT_FAULT_MODE = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Hi-Z	Active	Latched: CLR_FLT
Bus Current Limit	I_VM > BUS_CURRENT_LIMIT. Refer	BUS_CURRENT_LIMIT_ENABLE = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Active; motor speed will be restricted to limit DC bus current	Active	Automatic: Speed restriction is removed when I_VM < BUS_CURRENT_LIMIT
Current Loop Saturation	Indication of current loop saturation due to lower V_VM	SATURATION_FLAGS_EN = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Active; motor speed may not reach speed reference	Active	Automatic: motor will reach reference operating point upon exiting saturation
Speed Loop Saturation	Indication of speed loop saturation due to lower V_VM, lower ILIMIT setting etc.,	SATURATION_FLAGS_EN = 1b	nFAULT and CONTROLLER_FAULT_STATUS register	Active; motor speed may not reach speed reference	Active	Automatic: motor will reach reference operating point upon exiting saturation
Thermal warning (OTW)	T_J > T_OTW	OTW_REP = 0b	—	Active	Active	No action
Thermal warning (OTW)	T_J > T_OTW	OTW_REP = 1b	nFAULT and GATE_DRIVER_FAULT_STATUS register	Active	Active	Automatic: T_J < T_OTW – T_{OTW_HYS}
Thermal shutdown (TSD)	T_J > T_TSD	—	nFAULT and GATE_DRIVER_FAULT_STATUS register	Hi-Z	Active	Automatic: T_J < T_TSD – T_{TSD_HYS}