無碼破解壊版无码流出,又粗又大又黄的少妇毛片

SNVS764Q January 2000 – December 2017 LP2950-N , LP2951-N

PRODUCTION DATA.

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

LP|3
- MSOT002E
NDP|3
- MMSF021A

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

訂購信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽¹⁾

		MIN	MAX	UNIT
Input supply voltage - SHUTDOWN input voltage error comparator output voltage⁽²⁾		–0.3	30	V
FEEDBACK input voltage⁽²⁾⁽³⁾		–1.5	30	V
Power dissipation			Internally Limited
Junction temperature, T_J			150	°C
Soldering dwell time, temperature	Wave		4 seconds, 260
	Infrared		10 seconds, 240
	Vapor phase		75 seconds, 219
Storage temperature, T_stg		–65	150	°C

(1) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/Distributors for availability and specifications.

(2) May exceed input supply voltage.

(3) When used in dual-supply systems where the output terminal sees loads returned to a negative supply, the output voltage should be diode-clamped to ground.

7.2 ESD Ratings

				VALUE	UNIT
LP2950-N
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾		±2500	V
LP2951-N
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	IN, OUT, GND, ERROR	±2500	V
			SHUTDOWN	±2000
			SENSE	±1500
			VTAP, FEEDBACK	±1000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Maximum input supply voltage			30	V
Junction temperature, T_J⁽²⁾	LP2950AC-XX, LP2950C-XX	–40	125	°C
	LP2951	–55	150	°C
	LP2951AC-XX, LP2951C-XX	–40	125	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The junction-to-ambient thermal resistances are as follows: 157.4°C/W for the TO-92 (LP) package, 51.3°C/W for the TO-252 (NDP) package, 56.3°C/W for the molded PDIP (P), 117.7°C/W for the molded plastic SOIC (D), 171°C/W for the molded plastic VSSOP (DGK). The above thermal resistances for the P, D, and DGK packages apply when the package is soldered directly to the PCB. The value of R_θJA for the WSON (NGT) package is typically 43.3°C/W but is dependent on the PCB trace area, trace material, and the number of layers and thermal vias. For details of thermal resistance and power dissipation for the WSON package, see AN-1187 Leadless Leadframe Package (LLP).

7.4 Thermal Information: LP2950-N

THERMAL METRIC⁽¹⁾		LP2950-N		UNIT
		LP (TO-92)	NDP (TO-252)
		3 PINS	3 PINS
R_θJA⁽²⁾	Junction-to-ambient thermal resistance, High-K	157.4	51.3⁽³⁾	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	81.2	53.5	°C/W
R_θJB	Junction-to-board thermal resistance	153.6	30.4	°C/W
ψ_JT	Junction-to-top characterization parameter	25.2	5.5	°C/W
ψ_JB	Junction-to-board characterization parameter	n/a	30	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	n/a	2.2	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

(2) Thermal resistance value R_θJA is based on the EIA/JEDEC High-K printed circuit board defined by JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.

(3) The PCB for the TO-252 (NDP) package R_θJA includes twelve (12) thermal vias under the tab per EIA/JEDEC JESD51-5.

7.5 Thermal Information: LP2951-N

THERMAL METRIC⁽¹⁾		LP2951-N				UNIT
		P (PDIP)	D (SOIC)	DGK (VSSOP)	NGT (WSON)
		8 PINS	8 PINS	8 PINS	8 PINS
R_θJA⁽²⁾	Junction-to-ambient thermal resistance, High K	56.3	117.7	171.0	43.3⁽³⁾	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	45.7	63.7	62.3	35.0	°C/W
R_θJB	Junction-to-board thermal resistance	33.5	57.9	91.4	23.3	°C/W
ψ_JT	Junction-to-top characterization parameter	22.9	15.9	8.9	0.5	°C/W
ψ_JB	Junction-to-board characterization parameter	33.3	57.5	90.1	20.5	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	n/a	n/a	n/a	9.1	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

(2) Thermal resistance value R_θJA is based on the EIA/JEDEC High-K printed circuit board defined by JESD51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.

(3) The PCB for the WSON (NGT) package R_θJA includes six (6) thermal vias under the exposed thermal pad per EIA/JEDEC JESD51-5.

7.6 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

PARAMETER	TEST CONDITIONS⁽¹⁾	LP2951⁽²⁾			LP2950AC-XX LP2951AC-XX			LP2950C-XX LP2951C-XX			UNIT
PARAMETER	TEST CONDITIONS⁽¹⁾	MIN	TYP	MAX	MIN	TYP	MAX	MIN	TYP	MAX	UNIT
3-V VERSIONS⁽³⁾
Output voltage	T_J = 25°C	2.985	3	3.015	2.985	3	3.015	2.970	3	3.030	V⁽⁴⁾
	−25°C ≤ T_J ≤ 85°C				2.970	3	3.030	2.955	3	3.045	V⁽⁵⁾
	Full operating temperature range	2.964	3	3.036							V⁽⁴⁾
	Full operating temperature range				2.964	3	3.036	2.940	3	3.060	V⁽⁵⁾
Output voltage	100 µA ≤ I_L ≤ 100 mA, 100 µA ≤ I_L ≤ 100 mA, T_J ≤ T_JMAX	2.955	3	3.045							V⁽⁴⁾
Output voltage	100 µA ≤ I_L ≤ 100 mA, 100 µA ≤ I_L ≤ 100 mA, T_J ≤ T_JMAX				2.958	3	3.042	2.928	3	3.072	V⁽⁵⁾
3.3-V VERSIONS⁽³⁾
Output voltage	T_J = 25°C	3.284	3.3	3.317	3.284	3.3	3.317	3.267	3.3	3.333	V⁽⁴⁾
	−25°C ≤ T_J ≤ 85°C		3.3		3.267	3.3	3.333	3.251	3.3	3.350	V⁽⁵⁾
	Full operating temperature range	3.260	3.3	3.340							V⁽⁴⁾
	Full operating temperature range				3.260	3.3	3.340	3.234	3.3	3.366	V⁽⁵⁾
Output voltage	100 µA ≤ I_L ≤ 100 mA, T_J ≤ T_JMAX	3.251	3.3	3.350							V⁽⁴⁾
Output voltage	100 µA ≤ I_L ≤ 100 mA, T_J ≤ T_JMAX				3.254	3.3	3.346	3.221	3.3	3.379	V⁽⁵⁾
5-V VERSIONS⁽³⁾
Output voltage	T_J = 25°C	4.975	5	5.025	4.975	5	5.025	4.95	5	5.05	V⁽⁴⁾
	−25°C ≤ T_J ≤ 85°C		5		4.95	5	5.05	4.925	5	5.075	V⁽⁵⁾
	Full operating temperature range	4.94	5	5.06							V⁽⁴⁾
	Full operating temperature range				4.94	5	5.06	4.9	5	5.1	V⁽⁵⁾
Output voltage	100 µA ≤ I_L ≤ 100 mA, T_J ≤ T_JMAX	4.925	5	5.075							V⁽⁴⁾
Output voltage	100 µA ≤ I_L ≤ 100 mA, T_J ≤ T_JMAX				4.925	5	5.075	4.88	5	5.12	V⁽⁵⁾
ALL VOLTAGE OPTIONS
Output voltage temperature coefficient	See⁽⁶⁾, –40°C ≤ T_J ≤ 125°C		20	120							ppm/°C⁽⁴⁾
Output voltage temperature coefficient	See⁽⁶⁾, –40°C ≤ T_J ≤ 125°C					20	100		50	150	ppm/°C⁽⁵⁾
Line regulation⁽⁷⁾	(V_ONOM + 1 V) ≤ V_in ≤ 30 V⁽⁸⁾		0.03%	0.1%		0.03%	0.11%		0.04%	0.2%	See⁽⁴⁾
	(V_ONOM + 1 V) ≤ V_in ≤ 30 V⁽⁸⁾, –40°C ≤ T_J ≤ 125°C		0.03%	0.5%							See⁽⁴⁾
	(V_ONOM + 1 V) ≤ V_in ≤ 30 V⁽⁸⁾, –40°C ≤ T_J ≤ 125°C					0.03%	0.2%		0.04%	0.4%	⁽⁵⁾
Load regulation⁽⁷⁾	100 µA ≤ I_L ≤ 100 mA		0.04%	0.1%		0.04%	0.1%		0.1%	0.2%	See⁽⁴⁾
	100 µA ≤ I_L ≤ 100 mA, –40°C ≤ T_J ≤ 125°C		0.04%	0.3%							See⁽⁴⁾
	100 µA ≤ I_L ≤ 100 mA, –40°C ≤ T_J ≤ 125°C					0.04%	0.2%		0.1%	0.3%	See⁽⁵⁾
Dropout voltage⁽⁹⁾	I_L = 100 µA		50	80		50	80		50	80	mV⁽⁴⁾
	I_L = 100 µA, –40°C ≤ T_J ≤ 125°C			150							mV⁽⁴⁾
	I_L = 100 µA, –40°C ≤ T_J ≤ 125°C						150			150	mV⁽⁵⁾
	I_L = 100 mA		380	450		380	450		380	450	mV⁽⁴⁾
	I_L = 100 mA, –40°C ≤ T_J ≤ 125°C			600			600			600	mV⁽⁴⁾
	I_L = 100 mA, –40°C ≤ T_J ≤ 125°C						600			600	mV⁽⁵⁾
Ground current	I_L = 100 µA		75	120		75	120		75	120	µA⁽⁴⁾
	I_L = 100 µA, –40°C ≤ T_J ≤ 125°C			140							µA⁽⁴⁾
	I_L = 100 µA, –40°C ≤ T_J ≤ 125°C						140			140	µA⁽⁵⁾
	I_L = 100 mA		8	12		8	12		8	12	mA⁽⁴⁾
	I_L = 100 mA, –40°C ≤ T_J ≤ 125°C			14							mA⁽⁴⁾
	I_L = 100 mA, –40°C ≤ T_J ≤ 125°C						14			14	mA⁽⁵⁾
Dropout ground current	V_IN = (V_ONOM − 0.5)V, I_L = 100 µA		110	170		110	170		110	170	µA⁽⁴⁾
	V_IN = (V_ONOM − 0.5 V), I_L = 100 µA, –40°C ≤ T_J ≤ 125°C			200			200			200	µA⁽⁴⁾
	V_IN = (V_ONOM − 0.5 V), I_L = 100 µA, –40°C ≤ T_J ≤ 125°C						200			200	µA⁽⁵⁾
Current limit	V_OUT = 0 V		160	200		160	200		160	200	mA⁽⁴⁾
	V_OUT = 0 V, –40°C ≤ T_J ≤ 125°C			220							mA⁽⁴⁾
	V_OUT = 0 V, –40°C ≤ T_J ≤ 125°C						220			220	mA⁽⁵⁾
Thermal regulation	See⁽¹⁰⁾		0.05	0.2		0.05	0.2		0.05	0.2	%/W⁽⁴⁾
Output noise 10 Hz to 100 kHz	C_L = 1µF (5 V Only)		430			430			430		µV_RMS
	C_L = 200 µF		160			160			160		µV_RMS
	C_L = 3.3 µF (Bypass = 0.01 µF Pins 7 to 1 (LP2951-N)		100			100			100		µV_RMS
8-PIN VERSIONS ONLY		LP2951			LP2951AC-XX			LP2951C-XX
Reference voltage		1.22	1.235	1.25	1.22	1.235	1.25	1.21	1.235	1.26	V⁽⁴⁾
	–40°C ≤ T_J ≤ 125°C	1.2		1.26							V⁽⁴⁾
	–40°C ≤ T_J ≤ 125°C				1.2		1.26 1	1.2		1.27	V⁽⁵⁾
Reference voltage	See⁽¹¹⁾, –40°C ≤ T_J ≤ 125°C	1.19		1.27							V⁽⁴⁾
Reference voltage	See⁽¹¹⁾, –40°C ≤ T_J ≤ 125°C				1.19		1.27	1.185		1.285	V⁽⁵⁾
Feedback pin bias current			20	40		20	40		20	40	nA⁽⁴⁾
	–40°C ≤ T_J ≤ 125°C			60							nA ⁽⁴⁾
	–40°C ≤ T_J ≤ 125°C						60			60	nA⁽⁵⁾
Reference voltage temperature coefficient	See⁽⁶⁾		20			20			50		ppm/°C
Feedback pin bias current temperature coefficient			0.1			0.1			0.1		nA/°C
ERROR COMPARATOR
Output leakage current	V_OH = 30 V		0.01	1		0.01	1		0.01	1	µA⁽⁴⁾
	V_OH = 30 V, –40°C ≤ T_J ≤ 125°C			2							µA⁽⁴⁾
	V_OH = 30 V, –40°C ≤ T_J ≤ 125°C						2			2	µA⁽⁵⁾
Output low voltage	V_IN = (V_ONOM − 0.5 V), I_OL = 400 µA		150	250		150	250		150	250	mV⁽⁴⁾
	V_IN = (V_ONOM − 0.5 V), I_OL = 400 µA, –40°C ≤ T_J ≤ 125°C			400			400			400	mV⁽⁴⁾
	V_IN = (V_ONOM − 0.5 V), I_OL = 400 µA, –40°C ≤ T_J ≤ 125°C						400			400	mV⁽⁵⁾
Upper threshold voltage	See⁽¹²⁾	40	60		40	60		40	60		mV⁽⁴⁾
	See⁽¹²⁾, –40°C ≤ T_J ≤ 125°C	25									mV⁽⁴⁾
	See⁽¹²⁾, –40°C ≤ T_J ≤ 125°C				25			25			mV⁽⁵⁾
Lower threshold voltage	See⁽¹²⁾		75	95		75	95		75	95	mV⁽⁴⁾
	See⁽¹²⁾, –40°C ≤ T_J ≤ 125°C			140							mV⁽⁴⁾
	See⁽¹²⁾, –40°C ≤ T_J ≤ 125°C						140			140	mV⁽⁵⁾
Hysteresis	See⁽¹²⁾		15			15			15		mV
SHUTDOWN INPUT
Input			1.3			1.3			1.3		V
Logic voltage	Low (Regulator ON), –40°C ≤ T_J ≤ 125°C			0.6							V⁽⁴⁾
Logic voltage	Low (Regulator ON), –40°C ≤ T_J ≤ 125°C						0.7			0.7	V⁽⁵⁾
Logic voltage	High (Regulator OFF), –40°C ≤ T_J ≤ 125°C	2									V⁽⁴⁾
Logic voltage	High (Regulator OFF), –40°C ≤ T_J ≤ 125°C				2			2			V⁽⁵⁾
Shutdown pin input current	V_shutdown = 2.4 V		30	50		30	50		30	50	µA⁽⁴⁾
	V_shutdown = 2.4 V –40°C ≤ T_J ≤ 125°C			100							µA⁽⁴⁾
	V_shutdown = 2.4 V –40°C ≤ T_J ≤ 125°C						100			100	µA⁽⁵⁾
	V_shutdown = 30 V		450	600		450	600		450	600	µA⁽⁴⁾
	V_shutdown = 30 V, –40°C ≤ T_J ≤ 125°C			750							µA⁽⁴⁾
	V_shutdown = 30 V, –40°C ≤ T_J ≤ 125°C						750			750	µA⁽⁵⁾
Regulator output current in shutdown	See⁽¹³⁾		3	10		3	10		3	10	µA⁽⁴⁾
	–40°C ≤ T_J ≤ 125°C			20							µA⁽⁴⁾
	–40°C ≤ T_J ≤ 125°C						20			20	µA⁽⁵⁾

(1) Unless otherwise noted, all limits apply for T_A = T_J = 25°C as well as specified for V_IN = (V_ONOM + 1 V), I_L = 100 µA and C_L = 1 µF for 5-V versions and 2.2 µF for 3-V and 3.3-V versions. Additional conditions for the 8-pin versions are FEEDBACK tied to VTAP, OUTPUT tied to SENSE, and V_SHUTDOWN ≤ 0.8 V.

(2) A Military RETS specification is available on request.

(3) All LP2950 devices have the nominal output voltage coded as the last two digits of the part number. In the LP2951 products, the 3-V and 3.3-V versions are designated by the last two digits, but the 5-V version is denoted with no code at this location of the part number (refer to the Package Option Addendum at end of data sheet).

(4) Ensured and 100% production tested.

(5) Ensured but not 100% production tested. These limits are not used to calculate outgoing AQL levels.

(6) Output or reference voltage temperature coefficient is defined as the worst case voltage change divided by the total temperature range.

(7) Regulation is measured at constant junction temperature, using pulse testing with a low duty cycle. Changes in output voltage due to heating effects are covered under the specification for thermal regulation.

(8) Line regulation for the LP2951-N is tested at 150°C for I_L = 1 mA. For I_L = 100 µA and T_J = 125°C, line regulation is specified by design to 0.2%. See Typical Characteristics for line regulation versus temperature and load current.

(9) Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below its nominal value measured at 1-V differential. At very low values of programmed output voltage, the minimum input supply voltage of 2 V (2.3 V over temperature) must be taken into account.

(10) Thermal regulation is defined as the change in output voltage at a time T after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 50 mA load pulse at V_IN = 30 V (1.25-W pulse) for T = 10 ms.

(11) V_REF ≤ V_OUT ≤ (V_IN − 1 V), 2.3 V ≤ V_IN ≤ 30 V, 100 µA ≤ I_L ≤ 100 mA, T_J ≤ T_JMAX.

(12) Comparator thresholds are expressed in terms of a voltage differential at the FEEDBACK pin below the nominal reference voltage measured at V_IN = (V_O(NOM) + 1) V. To express these thresholds in terms of output voltage change, multiply by the error amplifier gain = V_OUT/V_REF = (R1 + R2) / R2.For example, at a programmed output voltage of 5 V, the ERROR output is specified to go low when the output drops by 95 mV × 5 V / 1.235 V = 384 mV. Thresholds remain constant as a percent of V_OUT as V_OUT is varied, with the dropout warning occurring at typically 5% below nominal, 7.5% ensured.

(13) V_SHUTDOWN ≥ 2 V, V_IN ≤ 30 V, V_OUT = 0, FEEDBACK pin tied to V_TAP.