SNAS879 December 2024 LMR60420
PRODMIX
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY (VIN PIN) | ||||||
| VINUVLO(R) | VIN UVLO rising threshold | VIN rising (needed to start up) | 2.7 | 3.0 | 3.2 | V |
| VINUVLO(F) | VIN UVLO falling threshold | VIN falling (once operating) | 2.65 | V | ||
| VINUVLO(H) | VIN UVLO hysteresis | 0.6 | V | |||
| VINOVP(R) | VIN OVP rising threshold | VIN rising needed to switch device into PFM operation | 35 | 37 | 39 | V |
| VINOVP(F) | VIN OVP falling threshold | VIN falling needed to switch device from PFM to FPWM operation | 34 | 36 | 38 | V |
| VINOVP(H) | VIN OVP hysteresis | 0.6 | 0.95 | 1.2 | V | |
| IQ(FIX-3.3V) | Total VIN quiescent current, fixed 3.3V output, no switching | VIN = 13.5V, IOUT = 0A, VFB = 3.3V + 4%, TJ = 25℃, Auto mode enabled | 3.55 | 5 | μA | |
| IQ(ADJ-3.3V) | Total VIN quiescent current, adjustable 3.3V output, no switching | VIN = 13.5V, IOUT = 0A, VFB = 1V + 4%, Auto mode enabled | 3.55 | 5 | μA | |
| IQ-SD | VIN shutdown supply current | VEN = 0V, +25c degrees results only | 0.65 | 1 | μA | |
| ENABLE (EN PIN) | ||||||
| VEN-TH(R) | Enable voltage rising threshold | VEN rising | 1.15 | 1.25 | 1.35 | V |
| VEN-TH(F) | Enable input low threshold | VEN falling | 0.9 | 1 | 1.1 | V |
| VEN-HYS | Enable voltage hysteresis | 275 | mV | |||
| IEN-LKG | Enable input leakage current | VEN = VIN | 1 | 665 | nA | |
| VOLTAGE REFERENCE (FB PIN) | ||||||
| VFB | Internal feedback reference voltage | FPWM mode | 0.99 | 1.0 | 1.01 | V |
| IFB-LKG | Feedback pin input leakage current | VFB = 1V, adjustable output voltage | 0.09 | 50 | nA | |
| VOUT(3.3V) | 3.3V fixed output voltage | FPWM mode, FB pin short to VOUT | 3.24 | 3.3 | 3.35 | V |
| VOUT(5V) | 5.0V fixed output voltage | FPWM mode, FB short to VOUT | 4.9 | 5 | 5.075 | V |
| START-UP | ||||||
| tSS | Internal fixed soft start time | Time from first SW pulse to VREF at 90% of set point | 6 | ms | ||
| CURRENT LIMITS AND HICCUP | ||||||
| IHS-LIM | High side peak current limit | Duty-cycle approaches 0% | 2.96 | 3.6 | 4.4 | A |
| ILS-LIM | Low side valley current limit | Valley current limit on LS FET | 2.0 | 2.5 | 3.0 | A |
| ILS-NEG-LIM | Low side negative current limit | Sinking current limit on LS FET, FPWM Mode | –1.2 | –0.85 | –0.6 | A |
| IL-ZC-LIM | Zero-cross current limit | VVCC = 3.3V, Auto mode | 40 | mA | ||
| VHIC | Over-current hiccup threshold on FB Pin | LS FET on-time > 165 ns, not during soft start | 0.14 | 0.2 | 0.25 | V |
| POWER GOOD (PG PIN) | ||||||
| VPG-OVP(R) | PG overvoltage rising threshold | % of FB voltage (Adj) | 105 | 107 | 109.7 | % |
| VPG-OVP(F) | PG overvoltage falling threshold | % of FB voltage (Adj) | 104 | 106 | 108 | % |
| VPG-UVP(R) | PG undervoltage rising threshold | % of FB voltage (Adj) | 92 | 94 | 96.6 | % |
| VPG-UVP(F) | PG undervoltage falling threshold | % of FB voltage (Adj) | 91 | 93 | 95 | % |
| tPG-DEGLITCH(F) | Deglitch filter delay on PG falling edge | 42 | 52 | 81 | μs | |
| tPG-DEGLITCH(R) | Deglitch filter delay on PG rising edge | 1.0 | 2.0 | 3.0 | ms | |
| VIN(PG-VALID) | Minimum VIN for valid PG output | VOL(PG) < 0.4V, RPU = 10k?, VPU = 5V | 1.25 | V | ||
| RON(PG) | PG ON resistance | IPG = 1mA | 165 | 420 | Ω | |
| SWITCHING FREQUENCY (RT PIN) | ||||||
| fSW1(FPWM) | Switching frequency, FPWM operation | RRT = 16.7k?, 1% | 1800 | 2000 | 2200 | kHz |
| fSW2(FPWM) | Switching frequency, FPWM operation | RRT = 34.4k?, 1% | 900 | 1000 | 1100 | kHz |
| SYNCHRONIZATION (MODE/SYNC PIN) | ||||||
| VIH to enter FPWM | Sync pin voltage to enter FPWM | 0.5 | 0.85 | V | ||
| VIL to exit FPWM | Sync pin voltage to exit FPWM | 0.35 | 0.7 | V | ||
| VIH(MODE/SYNC) | MODE/SYNC input high level threshold | 1.3 | V | |||
| VIL(MODE/SYNC) | MODE/SYNC input low level threshold | 0.35 | V | |||
| tCLKIN(TON) | Minimum positive pulse width of external sync signal | 150 | ns | |||
| TCLKIN(TOFF) | Minimum negative pulse width of external sync signal | 150 | ns | |||
| POWER STAGE | ||||||
| RDS-ON-HS | High-side FET ON resistance | ISW = 500mA, VBOOT-SW = 3.8V | 120 | 240 | m? | |
| RDS-ON-LS | Low-side FET ON resistance | ISW = 500mA, VBOOT-SW = 3.8V | 80 | 160 | m? | |
| tON-MIN(1) | Minimum on-time |
30 | ns | |||
| tOFF-MIN(1) | Minimum off-time | 89 | ns | |||
| THERMAL SHUTDOWN | ||||||
| TSD | Thermal Shutdown(1) | Shutdown threshold | 155 | 165 | 176 | oC |
| Recovery threshold | 156 | oC | ||||