ZHCSP67A October 2021 – January 2022 LMK1D2106 , LMK1D2108
PRODUCTION DATA
Figure 7-1 LVDS Output DC Configuration During Device Test
Figure 7-3 DC-Coupled LVCMOS Input During Device Test
Figure 7-4 Output Voltage and Rise/Fall Time
Figure 7-6 Output Overshoot and Undershoot
Figure 7-7 Output AC Common Mode