ZHCSI14A April 2018 – January 2022 LMK00334-Q1
PRODUCTION DATA
Unless otherwise specified: VCC = 3.3 V, VCCO = 3.3 V, TA = 25°C, CLKin driven differentially, input slew rate ≥ 3 V/ns.
Figure 6-1 HCSL
Output Swing at 250 MHz
| Fclk = 100 MHz | Foffset = 20 MHz |

| Fclk = 100 MHz | Int. BW = 1 to 20 MHz | |

| Fclk = 156.25 MHz | Vccco Ripple = 100 mVpp | |
Figure 6-9 Propagation Delay vs. Temperature
Figure 6-11 HCSL
Phase Noise at 100 MHz
Figure 6-2 LVCMOS Output Swing at 250 MHz
| Fclk = 156.25 MHz | Foffset = 20 MHz |

| Fclk = 156.25 MHz | Int. BW = 1 to 20 MHz | |

| Fclk = 312.5 MHz | Vccco Ripple = 100 mVpp | |
Figure 6-10 Crystal Power Dissipation vs. RLIM