SNAS576D February 2012 – March 2016 LMK00308
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Functional Block Diagram
- 5 Revision History
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
- 9 Detailed Description
- 10Application and Implementation
- 11Power Supply Recommendations
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- RTA|40
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- RTA|40
訂購信息
6 Pin Configuration and Functions
40-Pin WQFN
Package RTA
Top View
Pin Functions(3)
| PIN | TYPE | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| DAP | DAP | GND | Die Attach Pad. Connect to the PCB ground plane for heat dissipation. |
| 1, 2 | CLKoutA0, CLKoutA0* | O | Differential clock output A0. Output type set by CLKoutA_TYPE pins. |
| 3, 6 | VCCOA | PWR | Power supply for Bank A Output buffers. VCCOA can operate from 3.3 V or 2.5 V. The VCCOA pins are internally tied together. Bypass with a 0.1 uF low-ESR capacitor placed very close to each Vcco pin. (1) |
| 4, 5 | CLKoutA1, CLKoutA1* | O | Differential clock output A1. Output type set by CLKoutA_TYPE pins. |
| 7, 8 | CLKoutA2, CLKoutA2* | O | Differential clock output A2. Output type set by CLKoutA_TYPE pins. |
| 9, 10 | CLKoutA3, CLKoutA3* | O | Differential clock output A3. Output type set by CLKoutA_TYPE pins. |
| 11, 39 | CLKoutA_TYPE0, CLKoutA_TYPE1 | I | Bank A output buffer type selection pins (2) |
| 12, 35 | Vcc | PWR | Power supply for Core and Input buffer blocks. The Vcc supply operates from 3.3 V. Bypass with a 0.1 uF low-ESR capacitor placed very close to each Vcc pin. |
| 13 | OSCin | I | Input for crystal. Can also be driven by a XO, TCXO, or other external single-ended clock. |
| 14 | OSCout | O | Output for crystal. Leave OSCout floating if OSCin is driven by a single-ended clock. |
| 15, 18 | CLKin_SEL0, CLKin_SEL1 | I | Clock input selection pins (2) |
| 16, 17 | CLKin0, CLKin0* | I | Universal clock input 0 (differential/single-ended) |
| 19, 32 | CLKoutB_TYPE0, CLKoutB_TYPE1 | I | Bank B output buffer type selection pins (2) |
| 20, 31, 40 | GND | GND | Ground |
| 21, 22 | CLKoutB3*, CLKoutB3 | O | Differential clock output B3. Output type set by CLKoutB_TYPE pins. |
| 23, 24 | CLKoutB2*, CLKoutB2 | O | Differential clock output B2. Output type set by CLKoutB_TYPE pins. |
| 25, 28 | VCCOB | PWR | Power supply for Bank B Output buffers. VCCOB can operate from 3.3 V or 2.5 V. The VCCOB pins are internally tied together. Bypass with a 0.1 uF low-ESR capacitor placed very close to each Vcco pin. (1) |
| 26, 27 | CLKoutB1*, CLKoutB1 | O | Differential clock output B1. Output type set by CLKoutB_TYPE pins. |
| 29, 30 | CLKoutB0*, CLKoutB0 | O | Differential clock output B0. Output type set by CLKoutB_TYPE pins. |
| 33, 34 | CLKin1*, CLKin1 | I | Universal clock input 1 (differential/single-ended) |
| 36 | REFout | O | LVCMOS reference output. Enable output by pulling REFout_EN pin high. |
| 37 | VCCOC | PWR | Power supply for REFout Output buffer. VCCOC can operate from 3.3 V or 2.5 V. Bypass with a 0.1 uF low-ESR capacitor placed very close to each Vcco pin. (1) |
| 38 | REFout_EN | I | REFout enable input. Enable signal is internally synchronized to selected clock input. (2) |
(1) The output supply voltages/pins (VCCOA, VCCOB, and VCCOC) will be referred to generally as VCCO when no distinction is needed, or when the output supply can be inferred by the output bank/type.
(2) CMOS control input with internal pull-down resistor.
(3) Any unused output pins should be left floating with minimum copper length (see note in Clock Outputs), or properly terminated if connected to a transmission line, or disabled/Hi-Z if possible. See Clock Outputs for output configuration or Termination and Use of Clock Drivers output interface and termination techniques.