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SNVS412C April 2006 – September 2016 LM5109A

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

D|8
- MSOI002K
NGT|8
- MPDS406A

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

6 Specifications

6.1 Absolute Maximum Ratings

See ⁽¹⁾⁽²⁾

	MIN	MAX	UNIT
V_DD to V_SS	–0.3	18	V
HB to HS	−0.3	18	V
LI or HI to V_SS	−0.3	V_DD + 0.3	V
LO to V_SS	−0.3	V_DD + 0.3	V
HO to V_SS	V_HS − 0.3	V_HB + 0.3	V
HS to V_SS⁽³⁾	−5	90	V
HB to V_SS		108	V
Junction Temperature	–40	150	°C
Storage Temperature Range	−55	150	°C

(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is specified. Operating Ratings do not imply performance limits. For performance limits and associated test conditions, see the Electrical Characteristics.

(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications.

(3) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than V_DD – 15V. For example, if V_DD = 10V, the negative transients at HS must not exceed –5V.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM) ⁽¹⁾	±1500	V

(1) The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin.

6.3 Recommended Operating Conditions

	MIN	MAX	UNIT
V_DD	8	14	V
HS⁽¹⁾	−1	90	V
HB	V_HS + 8	V_HS + 14	V
HS Slew Rate		< 50	V/ns
Junction Temperature	−40	125	°C

(1) In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed –1V. However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur on HS, the HS voltage must never be more negative than V_DD – 15V. For example, if V_DD = 10V, the negative transients at HS must not exceed –5V.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		LM5109A		UNIT
		D (SOIC)	NGT (WSON)
		8 PINS	8 PINS
R_θJA	Junction-to-ambient thermal resistance	117.6	42.3	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	64.9	34	°C/W
R_θJB	Junction-to-board thermal resistance	58.1	19.3	°C/W
ψ_JT	Junction-to-top characterization parameter	17.4	0.4	°C/W
ψ_JB	Junction-to-board characterization parameter	57.6	19.5	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	–	8.1	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

Unless otherwise specified, V_DD = V_HB = 12V, V_SS = V_HS = 0V, No Load on LO or HO⁽¹⁾. Typical limits are for T_J = 25°C, and minimum and maximum limits apply over the operating junction temperature range (–40°C to 125°C).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY CURRENTS
I_DD	V_DD quiescent current	LI = HI = 0V		0.3	0.6	mA
I_DDO	V_DD operating current	f = 500 kHz		1.8	2.9	mA
I_HB	Total HB quiescent current	LI = HI = 0V		0.06	0.2	mA
I_HBO	Total HB operating current	f = 500 kHz		1.4	2.8	mA
I_HBS	HB to V_SS current, quiescent	V_HS = V_HB = 90V		0.1	10	µA
I_HBSO	HB to V_SS current, operating	f = 500 kHz		0.5		mA
INPUT PINS LI and HI
V_IL	Low-level input voltage threshold		0.8	1.8		V
V_IH	High-level input voltage threshold			1.8	2.2	V
R_I	Input pulldown resistance		100	200	500	kΩ
UNDER-VOLTAGE PROTECTION
V_DDR	V_DD rising threshold	V_DDR = V_DD – V_SS	6.0	6.7	7.4	V
V_DDH	V_DD threshold hysteresis			0.5		V
V_HBR	HB rising threshold	V_HBR = V_HB – V_HS	5.7	6.6	7.1	V
V_HBH	HB threshold hysteresis			0.4		V
LO GATE DRIVER
V_OLL	Low-level output voltage	I_LO = 100 mA, V_OHL = V_LO – V_SS		0.38	0.65	V
V_OHL	High-level output voltage	I_LO = −100 mA, V_OHL = V_DD – V_LO		0.72	1.20	V
I_OHL	Peak pullup current	V_LO = 0V		1.0		A
I_OLL	Peak pulldown current	V_LO = 12V		1.0		A
HO GATE DRIVER
V_OLH	Low-level output voltage	I_HO = 100 mA, V_OL_H = V_HO – V_HS		0.38	0.65	V
V_OHH	High-level output voltage	I_HO = −100 mA, V_OHH = V_HB – V_HO		0.72	1.20	V
I_OHH	Peak pullup current	V_HO = 0V		1.0		A
I_OLH	Peak pulldown current	V_HO = 12V		1.0		A

(1) Minimum and maximum limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlation using Statistical Quality Control (SQC) methods. Limits are used to calculate Average Outgoing Quality Level (AOQL).

6.6 Switching Characteristics

Unless otherwise specified, V_DD = V_HB = 12V, V_SS = V_HS = 0V, No Load on LO or HO. Typical limits are for T_J= 25°C, and minimum and maximum limits apply over the operating junction temperature range (–40°C to 125°C).

PARAMETER		TEST CONDITIONS	TYP	MAX	UNIT
t_LPHL	Lower turn-off propagation delay (LI falling to LO falling)		30	56	ns
t_HPHL	Upper turn-off propagation delay (HI falling to HO falling)		30	56	ns
t_LPLH	Lower turn-on propagation delay (LI rising to LO rising)		32	56	ns
t_HPLH	Upper turn-on propagation delay (HI rising to HO rising)		32	56	ns
t_MON	Delay matching: lower turn-on and upper turn-off		2	15	ns
t_MOFF	Delay matching: lower turn-off and upper turn-on		2	15	ns
t_RC, t_FC	Either output rise or fall time	C_L = 1000 pF	15	-	ns
t_PW	Minimum input pulse width that changes the output		50		ns