ZHCSK33G July 2008 – July 2019 LM3421 , LM3423
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison
- 6 Pin Configuration and Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3
Feature Description
- 8.3.1 Current Regulators
- 8.3.2 Predictive Off-Time (PRO) Control
- 8.3.3 Average LED Current
- 8.3.4 Analog Dimming
- 8.3.5 Current Sense and Current Limit
- 8.3.6 Overcurrent Protection
- 8.3.7 Zero Current Shutdown
- 8.3.8 Control Loop Compensation
- 8.3.9 Start-Up Regulator
- 8.3.10 Overvoltage Lockout (OVLO)
- 8.3.11 Input Undervoltage Lockout (UVLO)
- 8.3.12 PWM Dimming
- 8.3.13 LM3423 Only: DPOL, FLT, TIMR, and LRDY
-
9 Application and Implementation
- 9.1 Application Information
- 9.2
Typical Applications
- 9.2.1
Basic Topology Schematics
- 9.2.1.1 Design Requirements
- 9.2.1.2
Detailed Design Procedure
- 9.2.1.2.1 Operating Point
- 9.2.1.2.2 Switching Frequency
- 9.2.1.2.3 Average LED Current
- 9.2.1.2.4 Inductor Ripple Current
- 9.2.1.2.5 LED Ripple Current
- 9.2.1.2.6 Peak Current Limit
- 9.2.1.2.7 Loop Compensation
- 9.2.1.2.8 Input Capacitance
- 9.2.1.2.9 N-channel FET
- 9.2.1.2.10 Diode
- 9.2.1.2.11 Output OVLO
- 9.2.1.2.12 Input UVLO
- 9.2.1.2.13 PWM Dimming Method
- 9.2.1.2.14 Analog Dimming Method
- 9.2.2
LM3421 Buck-Boost Application
- 9.2.2.1 Design Requirements
- 9.2.2.2
Detailed Design Procedure
- 9.2.2.2.1 Operating Point
- 9.2.2.2.2 Switching Frequency
- 9.2.2.2.3 Average LED Current
- 9.2.2.2.4 Inductor Ripple Current
- 9.2.2.2.5 Output Capacitance
- 9.2.2.2.6 Peak Current Limit
- 9.2.2.2.7 Loop Compensation
- 9.2.2.2.8 Input Capacitance
- 9.2.2.2.9 N-channel FET
- 9.2.2.2.10 Diode
- 9.2.2.2.11 Input UVLO
- 9.2.2.2.12 Output OVLO
- 9.2.2.3 Application Curve
- 9.2.3 LM3421 BOOST Application
- 9.2.4 LM3421 Buck-Boost Application
- 9.2.5 LM3423 Boost Application
- 9.2.6 LM3421 Buck-Boost Application
- 9.2.7 LM3423 Buck Application
- 9.2.8 LM3423 Buck-Boost Application
- 9.2.9 LM3421 SEPIC Application
- 9.2.1
Basic Topology Schematics
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機械、封裝和可訂購信息
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- PWP|20
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- PWP|20
訂購信息
9.2.2.2.8 Input Capacitance
Solve for the minimum CIN:
Equation 127. 
To minimize power supply interaction a 200% larger capacitance of approximately 20 µF is used, therefore the actual ΔvIN-PP is much lower. Because high voltage ceramic capacitor selection is limited, four 4.7-µF X7R capacitors are chosen.
Determine minimum allowable RMS current rating:
Equation 128. 
The chosen components from step 8 are:
Equation 129. 