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SNVS572E July 2008 – January 2016 LM25037 , LM25037-Q1

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

PW|16
- MPDS361B

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating junction temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

	MIN	MAX	UNIT
VIN to GND	–0.3	76	V
VCC, RAMP , OUTA, OUTB to GND	–0.3	16	V
CS to GND	–0.3	1	V
UVLO, FB, RT2, RT1, SS, REF to GND	–0.3	7	V
COMP, RES⁽³⁾
Junction temperature		150	°C
Storage temperature	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) If Military/Aerospace specified devices are required, contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

(3) COMP, RES are output pins. As such, TI does not recommend connecting external power sources to these pins.

6.2 ESD Ratings: LM25037

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±750	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 ESD Ratings: LM25037-Q1

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾		±2000	V
		Charged-device model (CDM), per AEC Q100-011	All pins	±750
		Charged-device model (CDM), per AEC Q100-011	Corner pins (1, 8, 9, 16)	±750

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.4 Recommended Operating Conditions

over operating junction temperature range (unless otherwise noted)

	MIN	MAX	UNIT
VIN voltage	5.5	75	V
External voltage applied to VCC	8	14	V
Operating junction temperature	−40	125	°C

6.5 Thermal Information

THERMAL METRIC⁽¹⁾		LM25037/LM25037-Q1	UNIT
		PW (TSSOP)
		16 PINS
R_θJA	Junction-to-ambient thermal resistance	99.9	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	32.6	°C/W
R_θJB	Junction-to-board thermal resistance	45.8	°C/W
ψ_JT	Junction-to-top characterization parameter	2	°C/W
ψ_JB	Junction-to-board characterization parameter	45.1	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	N/A	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.6 Electrical Characteristics

V_VIN = 12V, V_VCC = 10V, R_RT1 = 30.1 kΩ, R_RT2 = 30.1 kΩ, V_UVLO = 3 V, T_J =−40°C to +125° unless otherwise stated.⁽¹⁾⁽²⁾

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
START-UP REGULATOR (VCC PIN)
V_VCC	VCC voltage	I_VCC = 10 mA		7.2	7.7	8.1	V
I_VCC(Lim)	VCC current limit	V_VCC = 7 V		20			mA
V_VCC(UV)	VCC Undervoltage threshold			4.6	5	5.4	V
V_VCC(UV)	Hysteresis				0.5		V
I_VIN	Start-up regulator current	V_VIN = 20 V, V_UVLO = 0 V			35	58	µA
		V_VIN = 75 V, V_UVLO = 0 V			45	80	µA
	Supply current into VCC from external source	Outputs and COMP open, V_VCC = 10 V, Outputs switching			4		mA
VOLTAGE REFERENCE REGULATOR (REF PIN)
V_REF	REF Voltage	I_REF = 0 mA		4.75	5	5.15	V
V_REF	REF Voltage Regulation	I_REF = 0 to 2.5 mA			7	25	mV
I_REF(Lim)	REF Current Limit	V_REF = 4.5 V		5	10		mA
I_REF(Lim)	VREF Undervoltage threshold			3.7	4	4.3	V
V_REF(UV)	Hysteresis				0.4		V
UNDERVOLTAGE LOCKOUT AND SHUTDOWN (UVLO PIN)
V_UVLO	Undervoltage threshold			1.20	1.25	1.295	V
I_UVLO	Hysteresis current	UVLO pin sinking		17	22	26	µA
	Undervoltage shutdown threshold	UVLO voltage rising		0.35	0.45	0.6	V
	Hysteresis				0.1		V
CURRENT SENSE INPUT (CS PIN)
V_CS	Current limit threshold			0.22	0.255	0.29	V
V_CS	CS delay to output	CS from 0 V to 1 V. Time for OUTA and OUTB to fall to 90% of VCC. Output load = 0 pF.			27		ns
	Leading edge blanking time at CS				65		ns
	CS sink impedance (clocked)	Internal FET sink impedance			21	45	Ω
CURRENT LIMIT RESTART (RES PIN)
V_RES	RES threshold			1.9	2	2.2	V
	Charge source current	V_RES = 1.5 V		14	18	21	µA
	Discharge sink current	V_RES = 1 V		5	8	11	µA
SOFT-START (SS PIN)
I_SS	Charging current in normal operation	V_SS = 0		70	100	130	µA
	Charging current during a hiccup mode restart	V_SS = 0		0.6	1	1.4	µA
	Soft-stop current sink	V_SS = 2 V		70	100	130	µA
OSCILLATOR (RT1 AND RT2 PINS)
DT₁	Dead-time 1	R_RT2 = 15 kΩ		40	75	105	ns
DT₂	Dead-time 2	R_RT2 = 50 kΩ			250		ns
F_SW1	Frequency 1 (at OUTA, half oscillator frequency)	R_RT1 = 30.1 kΩ, R_RT2 = 30.1 kΩ,		178	200	222	kHz
F_SW2	Frequency 2 (at OUTA, half oscillator frequency)	R_RT1 = 11 kΩ, R_RT2 = 30.1 kΩ,		448	515	578	kHz
	DC level				2		V
	Input sync threshold			2.5	3	3.4	V
PWM CONTROLLER (COMP PIN)
	Delay to output				65		ns
V_PWM-OS	SS to RAMP offset			0.7	1	1.2	V
	Minimum duty cycle	V_SS = 0 V	T_J = 25°C			0%
	COMP open-circuit voltage	V_FB = 0 V		4.5	4.75	5	V
	COMP short-circuit current	V_FB = 0 V, COMP = 0 V		0.5	1	1.5	mA
VOLTAGE FEED-FORWARD (RAMP PIN)
	RAMP sink impedance (clocked)				5	20	Ω
ERROR AMPLIFIER
GBW	Gain bandwidth				4		MHz
	DC gain				75		dB
	Input voltage	V_FB = COMP		1.22	1.245	1.27	V
	COMP sink capability	V_FB = 1.5 V COMP = 1 V	T_J = 25°C	5	13		mA
	FB bias current				10		nA
MAIN OUTPUT DRIVERS (OUTA and OUTB Pins)
	Output high voltage	I_OUT = 50 mA, (source)		Vcc-0.5	Vcc-0.25		V
	Output low voltage	I_OUT = 100 mA (sink)			0.2	0.5	V
	Rise time	C_LOAD = 1 nF			17		ns
	Fall time	C_LOAD = 1 nF			18		ns
	Peak source current	V_VCC = 10 V			1.2		A
	Peak sink current	V_VCC = 10 V			1.2		A
THERMAL SHUTDOWN
T_SD	Thermal shutdown threshold				165		°C
	Thermal shutdown hysteresis				25		°C

(1) All limits are ensured. All electrical characteristics having room temperature limits are tested during production at T_A = 25°C. All hot and cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process control.

(2) Typical specifications represent the most likely parametric norm at 25°C operation.