日韩精品在线观看免费,国产精品亚洲精品久久国语

ZHCS349G September 2011 – January 2015 ISO7640FM , ISO7641FM

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DW|16
- MSOI003I

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

DW|16
- QFND505A

訂購信息

8 Detailed Description

8.1 Overview

The isolator in Figure 13 is based on a capacitive isolation barrier technique. The I/O channel of the device consists of two internal data channels, a high-frequency channel (HF) with a bandwidth from 100 kbps up to
150 Mbps, and a low-frequency channel (LF) covering the range from 100 kbps down to DC. In principle, a single- ended input signal entering the HF-channel is split into a differential signal via the inverter gate at the input. The following capacitor-resistor networks differentiate the signal into transients, which then are converted into differential pulses by two comparators. The comparator outputs drive a NOR-gate flip-flop whose output feeds an output multiplexer. A decision logic (DCL) at the driving output of the flip-flop measures the durations between signal transients. If the duration between two consecutive transients exceeds a certain time limit, (as in the case of a low-frequency signal), the DCL forces the output-multiplexer to switch from the high- to the low-frequency channel.

Because low-frequency input signals require the internal capacitors to assume prohibitively large values, these signals are pulse-width modulated (PWM) with the carrier frequency of an internal oscillator, thus creating a sufficiently high frequency signal, capable of passing the capacitive barrier. As the input is modulated, a low-pass filter (LPF) is needed to remove the high-frequency carrier from the actual data before passing it on to the output multiplexer.

8.2 Functional Block Diagram

Figure 13. Conceptual Block Diagram of a Digital Capacitive Isolator

8.3 Feature Description

PRODUCT	RATED ISOLATION	PACKAGE	INPUT THRESHOLD	DATA RATE, INPUT FILTER	CHANNEL DIRECTION
ISO7640FM	6 KV_PK / 5 KV_RMS⁽¹⁾	DW-16	1.5 V TTL	150 Mbps, No Noise Filter	4 Forward, 0 Reverse
ISO7641FM	6 KV_PK / 5 KV_RMS⁽¹⁾	DW-16	1.5 V TTL	150 Mbps, No Noise Filter	3 Forward, 1 Reverse

(1) See the Table 2 table for detailed isolation ratings.

8.3.1 IEC Insulation and Safety-Related Specifications for DW-16 Package

PARAMETER		TEST CONDITIONS	MIN	TYP	UNIT
L(I01)	Minimum air gap (Clearance)	Shortest terminal to terminal distance through air	8.3		mm
L(I02)⁽¹⁾	Minimum external tracking (Creepage)	Shortest terminal to terminal distance across the package surface	8.1		mm
CTI	Tracking resistance (Comparative Tracking Index)	DIN IEC 60112 / VDE 0303 Part 1	≥400		V
	Minimum Internal Gap (Internal Clearance)	Distance through the insulation	0.014		mm
R_IO⁽²⁾	Isolation resistance, Input to Output	V_IO = 500 V, T_A = 25°C		>10¹²	Ω
R_IO⁽²⁾	Isolation resistance, Input to Output	V_IO = 500 V, 100°C ≤ T_A ≤ T_A max		>10¹¹	Ω
C_IO⁽²⁾	Barrier capacitance, Input to Output	V_I = 0.4 sin (2πft), f = 1MHz		2	pF
C_I⁽³⁾	Input capacitance	V_I = V_CC/2 + 0.4 sin (2πft), f = 1MHz, V_CC = 5 V		2	pF

(1) Per JEDEC package dimensions.

(2) All pins on each side of the barrier tied together creating a two-terminal device.

(3) Measured from input pin to ground.

NOTE

Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit-board (PCB) do not reduce this distance.

Creepage and clearance on a PCB become equal according to the measurement techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or ribs on a PCB are used to help increase these specifications.

8.3.2 DIN V VDE V 0884-10 (VDE V 0884-10) Insulation Characteristics

over recommended operating conditions (unless otherwise noted)⁽¹⁾

PARAMETER		TEST CONDITIONS	SPECIFICATION	UNIT
V_IORM	Maximum working insulation voltage		1414	V_PEAK
V_PR	Input-to-output test voltage	After Input/Output safety test subgroup 2/3, V_PR = V_IORM x 1.2, t = 10 s, Partial discharge < 5 pC	1697	V_PEAK
		Method a, After environmental tests subgroup 1, V_PR = V_IORM x 1.6, t = 10 s, Partial Discharge < 5 pC	2262
		Method b1, 100% Production test V_PR = V_IORM x 1.875, t = 1 s Partial discharge < 5 pC	2652
V_IOTM	Maximum transient overvoltage	V_TEST = V_IOTM t = 60 sec (Qualification) t = 1 sec (100% Production)	6000	V_PEAK
R_S	Insulation resistance	V_IO = 500 V at T_S	>10⁹	Ω
	Pollution degree		2

(1) Climatic Classification 40/125/21

Table 1. IEC 60664-1 Ratings Table

PARAMETER	TEST CONDITIONS	SPECIFICATION
Basic Isolation Group	Material Group	II
Installation classification	Rated mains voltage ≤ 300 V_RMS	I–IV
	Rated mains voltage ≤ 600 V_RMS	I–III
	Rated mains voltage ≤ 1000 V_RMS	I–II

Table 2. Regulatory Information

VDE	TUV	CSA	UL	CQC
Certified according to DIN V VDE V 0884-10 (VDE V 0084-10):2006-12	Certified according to EN/UL/CSA 60950-1 and EN/UL/CSA 61010-1	Approved under CSA Component Acceptance Notice 5A, IEC 61010-1, IEC 60950-1, IEC 60601-1	Recognized under UL 1577 Component Recognition Program	Certified according to GB4943.1-2011
Basic Insulation, Maximum Transient Overvoltage, 6000 V_PK , Maximum Working Voltage, 1414 V_PK	5000 V_RMS Isolation Rating, Reinforced Insulation, 400 V_RMS maximum working voltage, Basic Insulation, 600 V_RMS maximum working voltage	5000 V_RMS Isolation Rating, 380 V_RMSReinforced and 760 V_RMS Basic working voltage per CSA 60950-1-07 and IEC 60950-1 (2nd Ed.), 300 V_RMS Reinforced and 600 V_RMS Basic working voltage per CSA 61010-1-04 and IEC 61010-1 (2nd Ed.), 2 Means of Patient Protection at 125 V_RMS per CSA 60601-1:08 and IEC 60601-1 (3rd Ed.)	Single Protection, 4243 V_RMS⁽¹⁾	Reinforced Insulation, Altitude ≤ 5000 m, Tropical Climate, 250 V_RMS maximum working voltage
Certificate number: 40016131	Certificate number: U8V 13 09 77311 010	Master contract number: 220991	File Number: E181974	Certificate number: CQC14001109542

(1) Production tested ≥ 5092 VRMS for 1 second in accordance with UL 1577.

8.3.3 Safety Limiting Values

Safety limiting intends to prevent potential damage to the isolation barrier upon failure of input or output circuitry. A failure of the IO can allow low resistance to ground or the supply and, without current limiting, dissipate sufficient power to overheat the die and damage the isolation barrier potentially leading to secondary system failures.

Table 3. Safety Limiting Values

PARAMETER		TEST CONDITIONS		MAX	UNIT
I_S	Safety input, output, or supply current	DW-16	θ_JA = 72°C/W, V_I = 5.5 V, T_J = 150°C, T_A = 25°C	316	mA
			θ_JA = 72°C/W, V_I = 3.6 V, T_J = 150°C, T_A = 25°C	482
			θ_JA = 72°C/W, V_I = 2.7 V, T_J = 150°C, T_A = 25°C	643
T_S	Maximum case temperature			150	°C

The safety-limiting constraint is the absolute maximum junction temperature specified in the absolute maximum ratings table. The power dissipation and junction-to-air thermal impedance of the device installed in the application hardware determines the junction temperature. The assumed junction-to-air thermal resistance in the Thermal Information table is that of a device installed on a High-K Test Board for Leaded Surface Mount Packages. The power is the recommended maximum input voltage times the current. The junction temperature is then the ambient temperature plus the power times the junction-to-air thermal resistance.

ISO7640FM ISO7641FM Therm_derate_llse25.gif

Figure 14. DW-16 θ_JC Thermal Derating Curve per DIN V VDE V 0884-10

8.4 Device Functional Modes

Table 4. Function Table⁽¹⁾

V_CCI	V_CCO	INPUT (INx)	OUTPUT ENABLE (ENx)	OUTPUT (OUTx)
PU	PU	H	H or Open	H
		L	H or Open	L
		X	L	Z
		Open	H or Open	L
PD	PU	X	H or Open	L
PD	PU	X	L	Z
X	PD	X	X	Undetermined

(1) V_CCI = Input-side VCC; V_CCO = Output-side V_CC; PU = Powered Up (V_CC ≥ 2.7 V); PD = Powered Down (V_CC ≤ 2.1 V); X = Irrelevant; H = High Level; L = Low Level; Z = High Impedance