ZHCSST4C November 2002 – August 2024 CD74ACT14
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Figure 3-1 CD74ACT14 D or N Package,
14-Pin SOIC or PDIP (Top View)| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| 1A | 1 | Input | Channel 1, Input A |
| 1Y | 2 | Output | Channel 1, Output Y |
| 2A | 3 | Input | Channel 2, Input A |
| 2Y | 4 | Output | Channel 2, Output Y |
| 3A | 5 | Input | Channel 3, Input A |
| 3Y | 6 | Output | Channel 3, Output Y |
| GND | 7 | — | Ground |
| 4Y | 8 | Output | Channel 4, Output Y |
| 4A | 9 | Input | Channel 4, Input A |
| 5Y | 10 | Output | Channel 5, Output Y |
| 5A | 11 | Input | Channel 5, Input A |
| 6Y | 12 | Output | Channel 6, Output Y |
| 6A | 13 | Input | Channel 6, Input A |
| VCC | 14 | — | Positive Supply |