ZHCSQ87E November 1998 – May 2024 CD54HC164 , CD54HCT164 , CD74HC164 , CD74HCT164
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1MHz, ZO = 50?, tt < 6ns.
For clock inputs, fmax is measured when the input duty cycle is 50%.
The outputs are measured one at a time with one input transition per measurement.
Figure 5-1 Voltage Waveforms,
Standard CMOS Inputs Pulse Duration
Figure 5-2 Voltage Waveforms,
Standard CMOS Inputs Setup and Hold Times
Figure 5-3 Voltage Waveforms,
TTL-Compatible CMOS Inputs Pulse Duration
Figure 5-4 Voltage Waveforms,
TTL-Compatible CMOS Inputs Setup and Hold Times