Table 8. Design Parameters

9.2.2.1 Negative Output Voltage Protection

Reversely insert the battery pack into the charger output during production or hard shorts on battery-to-ground will generate negative output voltage on SRP and SRN pin. IC internal electrostatic-discharge (ESD) diodes from GND pin to SRP or SRN pins and two anti-parallel (AP) diodes between SRP and SRN pins can be forward biased and negative current can pass through the ESD diodes and AP diodes when output has negative voltage. Insert two small resistors for SRP and SRN pins to limit the negative current level when output has negative voltage. Suggest resistor value is 10 Ω for SRP pin and 7 Ω to 8 Ω for SRN pin. After adding small resistors, the suggested precharge current is at least 192 mA for a 10-mΩ current sensing resistor.

9.2.2.2 Inductor Selection

The IC has three selectable fixed switching frequencies. Higher switching frequency allows the use of smaller inductor and capacitor values. Inductor saturation current should be higher than the charging current (I_CHG) plus half the ripple current (I_RIPPLE):

Equation 4.

The inductor ripple current depends on input voltage (V_IN), duty cycle (D = V_OUT/V_IN), switching frequency (f_S), and inductance (L):

Equation 5.

The maximum inductor ripple current happens with D = 0.5 or close to 0.5. For example, the battery charging voltage range is from 9 V to 12.6 V for 3-cell battery pack. For 20-V adapter voltage, 10-V battery voltage gives the maximum inductor ripple current. Another example is 4-cell battery, the battery voltage range is from 12 V to 16.8 V, and 12-V battery voltage gives the maximum inductor ripple current.

Usually inductor ripple is designed in the range of (20-40%) maximum charging current as a trade-off between inductor size and efficiency for a practical design.

The IC has charge undercurrent protection (UCP) by monitoring charging current-sensing resistor cycle-by-cycle. The typical cycle-by-cycle UCP threshold is 5-mV falling edge corresponding to 0.5-A falling edge for a 10-mΩ charging current-sensing resistor. When the average charging current is less than 125 mA for a 10-mΩ charging current-sensing resistor, the low-side MOSFET is off until BTST capacitor voltage needs to refresh charge. As a result, the converter relies on low-side MOSFET body diode for the inductor freewheeling current.

9.2.2.3 Input Capacitor

Input capacitor should have enough ripple current rating to absorb input switching ripple current. The worst case RMS ripple current is half of the charging current when duty cycle is 0.5. If the converter does not operate at 50% duty cycle, then the worst case capacitor RMS current occurs where the duty cycle is closest to 50% and can be estimated by Equation 6:

Equation 6.

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be placed to the drain of the high-side MOSFET and source of the low-side MOSFET as close as possible. Voltage rating of the capacitor must be higher than normal input voltage level. 25-V rating or higher capacitor is preferred for 19- to 20-V input voltage. 10- to 20-μF capacitance is suggested for typical of 3- to 4-A charging current.

Ceramic capacitors show a DC-bias effect. This effect reduces the effective capacitance when a DC-bias voltage is applied across a ceramic capacitor, as on the input capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high input voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a DC bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value to get the required value at the operating point.

9.2.2.4 Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. The output capacitor RMS current is given:

Equation 7.

The IC has internal loop compensator. To get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed from 10 kHz to 20 kHz. The preferred ceramic capacitor is 25-V X7R or X5R for output capacitor. 10- to 20-μF capacitance is suggested for typical of 3- to 4-A charging current. Place capacitors after charging current-sensing resistor to get the best charge current regulation accuracy.

Ceramic capacitors show a DC-bias effect. This effect reduces the effective capacitance when a DC-bias voltage is applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead to a significant capacitance drop, especially for high output voltages and small capacitor packages. See the manufacturer's data sheet about the performance with a DC-bias voltage applied. It may be necessary to choose a higher voltage rating or nominal capacitance value to get the required value at the operating point.

9.2.2.5 Power MOSFETs Selection

Two external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are internally integrated into the IC with 6 V of gate drive voltage. 30-V or higher voltage rating MOSFETs are preferred for 19- to 20-V input voltage.

Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction loss and switching loss. For top-side MOSFET, FOM is defined as the product of the ON-resistance of the MOSFET, R_DS(ON), and the gate-to-drain charge, Q_GD. For bottom-side MOSFET, FOM is defined as the product of the ON-resistance of the MOSFET, R_DS(ON), and the total gate charge, Q_G.

The lower the FOM value, the lower the total power loss. Usually lower R_DS(ON) has higher cost with the same package size.

The top-side MOSFET loss includes conduction loss and switching loss. The loss is a function of duty cycle (D=V_OUT/V_IN), charging current (I_CHG), MOSFET's ON-resistance ®_DS(ON)), input voltage (V_IN), switching frequency (f_S), turnon time (t_on), and turnoff time (t_off):

Equation 9.

The first item represents the conduction loss. Usually MOSFET R_DS(ON) increases by 50% with 100°C junction temperature rise. The second term represents the switching loss. The MOSFET turnon and turnoff times are given by:

Equation 10.

where

• Q_sw is the switching charge.
• I_on is the turnon gate driving current.
• I_off is the turnoff gate driving current.

If the switching charge is not given in MOSFET data sheet, it can be estimated by gate-to-drain charge (Q_GD) and gate-to-source charge (Q_GS):

Equation 11.

Gate driving current can be estimated by REGN voltage (V_REGN), MOSFET plateau voltage (V_plt), total turnon gate resistance (R_on) and turnoff gate resistance (R_off) of the gate driver:

Equation 12.

The conduction loss of the bottom-side MOSFET is calculated with the following equation when it operates in synchronous continuous conduction mode:

Equation 13.

When charger operates in nonsynchronous mode, the bottom-side MOSFET is off. As a result all the freewheeling current goes through the body-diode of the bottom-side MOSFET. The body diode power loss depends on its forward voltage drop (V_F), nonsynchronous mode charging current (I_NONSYNC), and duty cycle (D).

The maximum charging current in nonsynchronous mode can be up to 0.25 A for a 10-mΩ charging current-sensing resistor or 0.5 A if battery voltage is less than 2.5 V. The minimum duty cycle happens at lowest battery voltage. Choose the bottom-side MOSFET with either an internal Schottky or body diode capable of carrying the maximum nonsynchronous mode charging current.

9.2.2.6 Input Filter Design

During adapter hot plug-in, the parasitic inductance and input capacitor from the adapter cable form a second-order system. The voltage spike at VCC pin maybe beyond IC maximum voltage rating and damage IC. The input filter must be carefully designed and tested to prevent overvoltage event on VCC pin.

There are several methods to damping or limit the over voltage spike during adapter hot plug-in. An electrolytic capacitor with high ESR as an input capacitor can damp the over voltage spike well below the IC maximum pin voltage rating. A high current capability TVS Zener diode can also limit the overvoltage level to an IC safe level. However these two solutions may not have low cost or small size.

A cost-effective and small-size solution is shown in Figure 17. The R1 and C1 are composed of a damping RC network to damp the hot plug-in oscillation. As a result, the overvoltage spike is limited to a safe level. D1 is used for reverse-voltage protection for VCC pin. C2 is the VCC pin decoupling capacitor and it should be placed as close as possible to the VCC pin. C2 value should be less than C1 value so R1 can dominant the equivalent ESR value to get enough damping effect. R2 is used to limit inrush current of D1 to prevent D1 getting damage when adapter hot plug-in. R2 and C2 should have a 10-µs time constant to limit the dv/dt on VCC pin to reduce inrush current when adapter hot plug in. R1 has high inrush current. R1 package must be sized enough to handle inrush current power loss according to resistor manufacturer’s data sheet. The filter components value always need to be verified with real application and minor adjustments may need to fit in the real application circuit.

Figure 17. Input Filter

Table 9. Component List for Typical System Circuit of Figure 16