ZHCSLH4 April 2021 AMC3336
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| ANALOG INPUT | ||||||
| RIN | Single-ended input resistance | INN = HGND | 0.06 | 1 | GΩ | |
| RIND | Differential input resistance | 0.06 | 1 | GΩ | ||
| IIB | Input bias current | INP = INN = HGND; IIB = (IIBP + IIBN) / 2 | –10 | 10 | nA | |
| IIO | Input offset current(1) | IIO = IIBP – IIBN | –5 | ±0.5 | 5 | nA |
| CIN | Single-ended input capacitance | INN = HGND; fIN = 310 kHz, fCLKIN = 20 MHz | 2 | pF | ||
| CIND | Differential input capacitance | fIN = 310 kHz, fCLKIN = 20 MHz | 2 | pF | ||
| ACCURACY | ||||||
| EO | Offset error(1) | INP = INN = HGND, TA = 25°C | –0.3 | ±0.04 | 0.3 | mV |
| TCEO | Offset error thermal drift(4) | –4 | 4 | μV/°C | ||
| EG | Gain error | TA = 25°C | –0.2% | 0.2% | ||
| TCEG | Gain error thermal drift(5) | –40 | 40 | ppm/°C | ||
| DNL | Differential nonlinearity | Resolution: 16 bits | –0.99 | 0.99 | LSB | |
| INL | Integral nonlinearity | Differential measurement; Resolution: 16 bits | –4 | 4 | LSB | |
| Single-ended measurement; Resolution: 16 bits | –6 | 6 | ||||
| SNR | Signal-to-noise ratio | fIN = 1 kHz | 80 | 84 | dB | |
| SINAD | Signal-to-noise + distortion | fIN = 1 kHz | 77 | 84 | dB | |
| THD | Total harmonic distortion(3) | VIN = 2 VPP, fIN = 1 kHz | –93 | –80 | dB | |
| SFDR | Spurious-free dynamic range | VIN = 2 VPP, fIN = 1 kHz | 79 | 96 | dB | |
| CMRR | Common-mode rejection ratio | INP = INN, fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max | –104 | dB | ||
| INP = INN, fIN = 10 kHz, –0.5 V ≤ VIN ≤ 0.5 V | –89 | |||||
| PSRR | Power-supply rejection ratio | VDD from 3.0 V to 5.5 V, at dc | –109 | dB | ||
| INP = INN = HGND, VDD from 3.0 V to 5.5 V, 10 kHz / 100 mV ripple | –104 | |||||
| DIGITAL I/O | ||||||
| IIN | Input leakage current | GND ≤ VIN ≤ VDD | 7 | μA | ||
| CIN | Input capacitance | 4 | pF | |||
| VIH | High-level input voltage | 0.7 × VDD | VDD + 0.3 | V | ||
| VIL | Low-level input voltage | –0.3 | 0.3 × VDD | V | ||
| CLOAD | Output load capacitance | 15 | 30 | pF | ||
| VOH | High-level output voltage | IOH = –20 μA | VDD – 0.1 | V | ||
| IOH = –4 mA | VDD – 0.4 | |||||
| VOL | Low-level output voltage | IOL = 20 μA | 0.1 | V | ||
| IOL = 4 mA | 0.4 | |||||
| CMTI | Common-mode transient immunity | 90 | 150 | kV/μs | ||
| POWER SUPPLY | ||||||
| IDD | Low-side supply current | no external load on HLDO | 28.5 | 42.5 | mA | |
| 1 mA external load on HLDO | 30.5 | 44.5 | ||||
| VDDUV | VDD analog undervoltage detection threshold | VDD rising | 2.9 | V | ||
| VDD falling | 2.8 | |||||
| VDDPOR | VDD digital reset threshold | VDD rising | 2.5 | V | ||
| VDD falling | 2.4 | |||||
| VDCDC_OUT | DC/DC output voltage | DCDC_OUT to HGND | 3.1 | 3.5 | 4.65 | V |
| VDCDCUV | DC/DC output undervoltage detection threshold voltage | VDCDC_OUT falling | 2.1 | 2.25 | V | |
| VHLDO_OUT | High-side LDO output voltage | HLDO_OUT to HGND, up to 1 mA external load (2) |
3 | 3.2 | 3.4 | V |
| VHLDOUV | High-side LDO output undervoltage detection threshold voltage | VHLDO_OUT falling | 2.4 | 2.6 | V | |
| IH | High-side supply current for auxiliary circuitry | Load connected from HLDOout to HGND; non-switching; –40℃ ≤ TA ≤ 85℃(2) | 1 | mA | ||
| tSTART | Device startup time | VDD step from 0 to 3.0 V to bitstrem valid | 0.6 | 1.1 | ms | |