ZHCS339E August 2010 – June 2019 AFE031
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 說明（續(xù)）
- 6 Device Comparison Table
- 7 Pin Configuration and Functions
-
8 Specifications
- 8.1 Absolute Maximum Ratings
- 8.2 ESD Ratings
- 8.3 Thermal Information
- 8.4 Electrical Characteristics: Transmitter (Tx)
- 8.5 Electrical Characteristics: Power Amplifier (PA)
- 8.6 Electrical Characteristics: Receiver (Rx)
- 8.7 Electrical Characteristics: Digital
- 8.8 Electrical Characteristics: Two-Wire Interface
- 8.9 Electrical Characteristics: Internal Bias Generator
- 8.10 Electrical Characteristics: Power Supply
- 8.11 Timing Requirements
- 8.12 Timing Diagrams
- 8.13 Typical Characteristics
- 9 Detailed Description
- 10Application and Implementation
- 11器件和文檔支持
- 12機(jī)械、封裝和可訂購信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RGZ|48
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購信息
7 Pin Configuration and Functions
RGZ PACKAGE
QFN-48
(TOP VIEW)
NOTE:
Exposed thermal pad is connected to ground.Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| AGND1 | 12 | — | Analog ground |
| AGND2 | 29 | — | Analog ground |
| AVDD1 | 11 | — | Analog supply |
| AVDD2 | 30 | — | Analog supply |
| CS | 6 | — | SPI digital chip select |
| DAC | 7 | — | DAC mode select |
| DIN | 4 | I | SPI digital input |
| DGND | 1 | — | Digital ground |
| DOUT | 5 | O | SPI digital output |
| DVDD | 2 | — | Digital supply |
| E_Rx_IN | 32 | I | Two-wire receiver input |
| E_Rx_OUT | 31 | O | Two-wire receiver output |
| E_Tx_CLK | 35 | I | Two-wire transmitter clock input |
| E_Tx_IN | 34 | I | Two-wire transmitter input |
| E_Tx_OUT | 33 | O | Two-wire transmitter output |
| INT | 9 | — | Interrupt on overcurrent or thermal limit |
| PA_GND1 | 41 | — | Power Amplifier ground |
| PA_GND2 | 40 | — | Power Amplifier ground |
| PA_IN | 18 | I | Power Amplifier input |
| PA_ISET | 46 | — | Power Amplifier current limit set |
| PA_OUT1 | 43 | O | Power Amplifier output |
| PA_OUT2 | 42 | O | Power Amplifier output |
| PA_VS1 | 45 | — | Power Amplifier supply |
| PA_VS2 | 44 | — | Power Amplifier supply |
| REF1 | 19 | — | Power Amplifier noise reducing capacitor |
| REF2 | 28 | — | Receiver noise reducing capacitor |
| Rx_C1 | 24 | — | Receiver external frequency select |
| Rx_C2 | 23 | — | Receiver external frequency select |
| Rx_F_IN | 25 | I | Receiver filter input |
| Rx_F_OUT | 22 | O | Receiver filter output |
| Rx_FLAG | 48 | — | Receiver ready flag |
| Rx PGA1_IN | 27 | I | Receiver PGA(1) input |
| Rx PGA1_OUT | 26 | O | Receiver PGA(1) output |
| Rx PGA2_IN | 21 | I | Receiver PGA(2) input |
| Rx PGA2_OUT | 20 | O | Receiver PGA(2) output |
| SCLK | 3 | — | SPI serial clock |
| SD | 8 | — | System shutdown |
| TSENSE | 10 | — | Temp sensing diode (anode) |
| Tx_F_IN1 | 15 | I | Transmit filter input 1 |
| Tx_F_IN2 | 16 | I | Transmit filter input 2 |
| Tx_F_OUT | 17 | O | Transmit filter output |
| Tx_FLAG | 47 | — | Transmitter ready flag |
| Tx_PGA_IN | 13 | I | Transmit PGA input |
| Tx_PGA_OUT | 14 | O | Transmit PGA output |
| ZC_IN1 | 39 | I | Zero crossing detector input |
| ZC_IN2 | 38 | I | Zero crossing detector input |
| ZC_OUT1 | 37 | O | Zero crossing detector output |
| ZC_OUT2 | 36 | O | Zero crossing detector output |