亚洲AV无码一区二区三区观看,成人大色情男女网站,国产免费视频线观看视频

ZHCSQQ1B june 2022 – august 2023 ADC32RF54 , ADC32RF55

PRODUCTION DATA

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

RTD|64
- MPQF141C

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

RTD|64
- QFND625

訂購信息

6.6 Electrical Characteristics - DC Specifications

Maximum and minimum values are specified over the operating free-air temperature range and nominal supply voltages. Typical values are specified at T_A = 25°C, ADC sampling rate = 3.0 GSPS, Bypass mode, 50% clock duty cycle, AVDD18 = 1.8 V, AVDD12, AVDDCLK, DVDD = 1.2 V and –1-dBFS differential input, unless otherwise noted

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
DC ACCURACY
DNL	Differential nonlinearity	F_IN = 10 MHz		±0.85		LSB
INL	Integral nonlinearity	F_IN = 10 MHz		±3.5		LSB
V_{OS_ERR}	Offset error			±2		%FSR
GAIN_ERR	Gain error			±3		%FSR
GAIN_Match	Gain matching across channels			±0.2		dB
ADC ANALOG INPUTS (INA1P/M, INB1P/M, INA2P/M, INB2P/M)
FS	Input full scale	Differential, non-average mode		1.1		Vpp
FS	Input full scale	Differential, 2x or 4x average mode		1.35		Vpp
V_ICM	Input common model voltage		250	350	450	mV
Z_IN	Differential input impedance	Differential at 100 MHz		100		Ω
V_OCM	Output common mode voltage			350		mV
BW	Analog Input Bandwidth (-3 dB)	1x, 2x AVG, RSW=1		2.75		GHz
BW	Analog Input Bandwidth (-3 dB)	4x AVG, RSW=1		2.1		GHz
Phase imbalance, analog input				±2		deg
Amplitude imablance, analog input				±0.5		dB
CMRR	Common mode rejection ratio	F_IN = 100 MHz		25		dB
CLOCK INPUT (CLKP/M)
Input clock frequency		ADC32RF54	500		2600	MHz
Input clock frequency		ADC32RF55	500		3000	MHz
V_ID	Differential input voltage			1	2.4	Vpp
V_ICM	Input common mode voltage		0.65	0.75	0.85	V
Z_IN	Differential input impedance	Differential at 2.6 GHz		100		Ω
Clock duty cycle			45	50	55	%
SYSREF INPUT (SYSREFP/M)
V_ID	Differential input voltage		600	800	1000	mVpp
V_ICM	Input common mode voltage	Input common mode voltage	1.05	1.2	1.4	V
Z_IN	Differential input impedance			100		Ω
DIGITAL INPUTS (RESET, PDN, SCLK, SEN, SDIO, GPIO1/2, SPISEL)
V_IH	High-level input voltage		0.8			V
V_IL	Low-level input voltage				0.4	V
C_I	Input capacitance			0.6		pF
DIGITAL OUTPUT (SDIO)
V_OH	High-level output voltage	I_LOAD = -400 uA	AVDD18 – 0.1	AVDD18		V
V_OL	Low-level output voltage	I_LOAD = 400 uA			0.1	V
CML SERDES OUTPUTS: DOUT[0:7]P/M
V_OD	Serdes transmitter output amplitude	differential peak-peak		700		mVpp
V_OCM	Serdes transmitter output common mode			425		mV
Z_TX	Serdes transmitter single ended termination impedance			50		Ω
	Transmitter short-circuit current	Transmitter pins shorted to any voltage between –0.25 V and 1.45 V	–100		100	mA