OBSSCircuit DescriptionV1.1010/02/94 20:07 CET.Component & analysis parameters of a circuit.TINA 9.2.30.193 SF-TIB(c) Copyright 1993,94,95,96 DesignSoft Inc. All rights reserved.; $Circuit$w?VER=1.0Font0=Verdana,14Font1=Verdana,14,BRect0=2,0,0,85,22Rect1=1,0,0,85,10Rect2=1,0,10,10,17Rect3=1,10,10,75,17Rect4=1,75,10,85,17Rect5=1,0,17,50,22Rect6=1,50,17,85,22Text0=0,2,2,TitleText1=0,2,11,SizeText2=0,2,18,DateText3=0,12,11,Document No.Text4=0,77,11,RevText5=0,52,18,SheetText6=0,70,18,ofField0=1,T,11,2,80Field1=1,T,11,5,80Field2=1,S,4,13,5Field3=1,T,14,13,40Field4=1,R,78,13,6Field5=1,D,12,18,30Field6=1,P,64,18,3Field7=1,A,77,18,33F0= HIGH-VOLTAGE, LOW-DISTORTION, CURRENT-FEEDBACK F1=THS3095F4=2F5=02/21/2012F6=1F7=1F3=Datasheet: SLOS423Gg@ Arial * THS3095 SUBCIRCUIT=* HIGH SPEED MONLITHIC OPERATIONAL AMPLIFIER WITH POWER DOWN9* THIS MODEL SIMULATES TYPICAL VALUES FOR THE FOLLOWING:P* SETTLING TIME, OUTPUT VOLTAGE LIMIT, INPUT VOLTAGE NOISE, INPUT BIAS CURRENT,C* TYPICAL VALUES FOR INPUT OFFSET VOLTAGE AND OFFSET BIAS CURRENT,:* QUIESCENT CURRENT, OUTPUT IMPEDANCE AND LOADING EFFECTSI* BANDWIDTH IS HIGH IN GAINS OF +1V/V AND +2V/V AND LOW AT HIGHER GAINS \* SLEW RATE IS CORRECT AT 2VSTEP BUT DOES NOT INCREASE WITH STEP SIZE AS ACTUAL DEVICE DOES7* THIS MODEL WILL NOT PROVIDE ACCURATE SIMULATION OF: O* CMRR AND PSRR, INPUT CURRENT NOISE, DISTORTION, INPUT OFFSET, OPEN LOOP GAINSymbol????333333??;PPPPT_0CC69BD020120221114907;PhPHPhPHT_0CC6981020120221114907?00000T_0CC6945020120221114907;00T_0CC6909020120221114907;x8x`x8x`T_0CC68CD020120221114907;xxxxT_0CC6891020120221114907;`p`pT_0CC6855020120221114907;8H8HT_0CC6819020120221114907;`8`H`8`HT_0CC67DD020120221114907;T_0CC67A1020120221114907;````T_0CC6765020120221114907; 8 8T_0CC6729020120221114907?( 8 ( ( 8 T_0CC66ED020120221114907; (  ( T_0CC66B1020120221114907?H( H(( T_0CC6675020120221114907;0x00x0T_0CC6639020120221114907?p0p0T_0CC65FD020120221114907;xxxxT_0CC65C1020120221114907?`x``xT_0CC6585020120221114907;xxxxT_0CC6549020120221114907;0000T_0CC650D020120221114907;080H080HT_0CC64D1020120221114907;`` `` T_0CC388D020120221114907;`@`P`@`PT_0CC38C9020120221114907;(@8@(@8@T_0CC3905020120221114907;8080T_0CC3941020120221114907DB{x VccT_04987E3820090817160805.@DB{x VeeT_04F8A9D820090817160805.@B0%VinT_04C1C5E820090817160805 L9802 (VG)@SAA: >DBz` V3T_0555B01020090817161559@DBz V4T_0555946C20090817161559BgOutT_05B95F1020090817161821:BXU2T_0439E2E020090909125314  Rnoiseless Rnoiseless3C:\Userdata\eLab\Noiseless resistor\Rnoiseless.libSCK#R=1.2K RnoiselessLabel PP(d*a @d*b @ e  dde dde ddeddeddeddeddeddeddeddgRnArial$I$I?S$M-@S$M-@$.subckt rnoiseless a b PARAMS: R=1kH_H1 c b VH_H1 {R} VH_H1 a c 0.endsab:B U3T_043BB7B420090909125404  Rnoiseless Rnoiseless3C:\Userdata\eLab\Noiseless resistor\Rnoiseless.libSCK#R=1.2K RnoiselessLabel PP(d*a @d*b @ e  dde dde ddeddeddeddeddeddeddeddgRnArial$I$I?S$M-@S$M-@$.subckt rnoiseless a b PARAMS: R=1kH_H1 c b VH_H1 {R} VH_H1 a c 0.endsab:BPU4T_04605F7C20090909125517  Rnoiseless Rnoiseless3C:\Userdata\eLab\Noiseless resistor\Rnoiseless.libSCK#R=100 RnoiselessLabel PP(d*a @d*b @ e  dde dde ddeddeddeddeddeddeddeddgRnArial$I$I?S$M-@S$M-@$.subckt rnoiseless a b PARAMS: R=1kH_H1 c b VH_H1 {R} VH_H1 a c 0.endsab:B069U5T_0CC5085020120221120857 THS3095THS3095SC:\Users\a0199733\AppData\Local\Temp\DesignSoft\{Tina9-TI-07142011-092834}\THS3095SCK#THS3095Label KCAAPP69d*inp 8 @d*inn  @d*vcch  @ @d*vee   @d*outg H( @d*pdc408 @d*refh/C0 @ h @@00g"- Courier New?g"+ Courier New1?g"+ Courier New+?e00dde00dde0700ddgPDArial61$I$I?gRefArial6$I$I?32@32@ * THS3095, H* HIGH-VOLTAGE, LOW-DISTORTION, CURRENT-FEEDBACK OPERATIONAL AMPLIFIERS*N*****************************************************************************t* (C) Copyright 2009 Texas Instruments Incorporated. All rights reserved. N*****************************************************************************s** Thismodelis designed as an aid for customers of Texas Instruments. t**TI and itslicensors and suppliers makeno warranties, either expressed y** or implied, with respect to thismodel, including thewarranties of w** merchantability or fitness fora particular purpose. The model is ~** provided solely on an "as is" basis. The entirerisk as to its quality ** and performance is with the customer N******************************************************************************?* Released by: WEBENCH Design Center, Texas Instruments Inc.* Part: THS3095* Written: 02/21/2012 * Model Type: TINA-TI** Simulator: Version 9.2.30.193 SF-TI* Revision: 2>* Datasheet: SLOS423GSEPTEMBER 2003REVISED OCTOBER 2008;* NOTE: This rev fixes the ON and OFF polarity of PD pin. *N****************************************************************************** THS3095 SUBCIRCUIT=* HIGH SPEED MONLITHIC OPERATIONAL AMPLIFIER WITH POWER DOWN* WRITTEN 8/14/099* THIS MODEL SIMULATES TYPICAL VALUES FOR THE FOLLOWING:P* SETTLING TIME, OUTPUT VOLTAGE LIMIT, INPUT VOLTAGE NOISE, INPUT BIAS CURRENT,C* TYPICAL VALUES FOR INPUT OFFSET VOLTAGE AND OFFSET BIAS CURRENT,:* QUIESCENT CURRENT, OUTPUT IMPEDANCE AND LOADING EFFECTSI* BANDWIDTH IS HIGH IN GAINS OF +1V/V AND +2V/V AND LOW AT HIGHER GAINS \* SLEW RATE IS CORRECT AT 2VSTEP BUT DOES NOT INCREASE WITH STEP SIZE AS ACTUAL DEVICE DOES7* THIS MODEL WILL NOT PROVIDE ACCURATE SIMULATION OF: O* CMRR AND PSRR, INPUT CURRENT NOISE, DISTORTION, INPUT OFFSET, OPEN LOOP GAIN+.subckt THS3095 inp inn out vcc vee ref pd(* The Model Editor is a PSpice product..MODEL bi_pnp PNP + RC=100+ CJE=20.000E-15+ CJC=20.000E-15 + KF=7.5e-15 + AF=1.30.MODEL bi_npn NPN + RC=100+ CJE=20.000E-15+ CJC=20.000E-15 + KF=7.5e-15 + AF=1.30.MODEL D_break D+ RS=1.0000E-1+ CJO=1.0000E-13 + IS=100e-15;.MODEL S_VSWITCH_1 VSWITCH (RON=1G ROFF=1 VON=1 VOFF=400M);.MODEL S_VSWITCH_2 VSWITCH (RON=1 ROFF=1G VON=1 VOFF=900M)* source THS3095 *Power Down &EVCVS1 0 60 REF PD 500M&EVCVS2 61 VEE VCC VEE 500MR23 60 62 100R22 61 63 10k !R21 62 63 100GC2 62 63 2p!R20 62 63 294k(SW1 65 64 62 0 S_VSWITCH_2V3 64 63 10.2(SW2 66 67 62 0 S_VSWITCH_1V6 67 63 1mVCCCS6_in 69 VEE)FCCCS6 N00923 VEE VCCCS6_in 1mVCCCS5_in 70 73+FCCCS5 VCC 69 VCCCS5_in 1m R24 73 63 10KVCCCS4_in 66 70+FCCCS4 VCC N00889 VCCCS4_in 1m VCCCS3_in 71 74,FCCCS3 VCC 75 VCCCS3_in 1.505!R19 74 63 10K VCCCS2_in 75 VEE .FCCCS2 N00923 VEE VCCCS2_in 1.505 VCCCS1_in 65 71 .FCCCS1 VCC N00889 VCCCS1_in 1.505 * Input stage!E_E6 INPP INP N33650 0 1R_R24 0 N33650 700 C_C6 0 N33650 1f V_V6 IN INN 0.9mVdcC_C3 0 INN 630f I_I4 INP 0 -4.5uAI_I5 INN 0 -3uA&Q_Q15 VCC INPP N00923 BI_NPN 4'Q_Q16 N01029 N00889 IN BI_NPN 4-Q_Q17 N01060 N01060 N013920 BI_NPN 12'Q_Q21 N01060 N00923 IN BI_PNP 4%Q_Q22 VEE INP N00889 BI_PNP 4,Q_Q23 N01029 N01029 N01331 BI_PNP 12 R_R1 N01331 N01300 250!R_R2 N01429 N013920 250 * mirrors.X_F1 VCC N01300 VCC LLL SCHEMATIC1_F1.X_F2 N01429 VEE LLL VEE SCHEMATIC1_F2 * clamps"D_D5 LLL N29734 D_BREAK 2"D_D6 N29798 LLL D_BREAK 2 V_V7 N29734 VCC -2.3VdcV_V8 N29798 VEE 2.3Vdc%* frequency shaping and compensationC_C1 eref LLL 0.67pR_R3 eref LLL 900kR_R11 eref INT 1000C_C5 eref INT 400f #G_G1 INT eref LLL eref -1m* buffer and output stages'E_E1 VCC N02648 N02361 eref -1&E_E2 N02628 VEE N02418 eref 1%D_D3 N02648 N02743 D_BREAK 8&D_D4 N028591 N02628 D_BREAK 8R_R5 N02855 N02743 5R_R7 N028591 N02855 5!E_E101 avg vee vcc vee 0.5E_E102 eref 0 avg 0 1 E_E103 diff 0 vcc vee 0.5#E_E104 lshift 0 diff ddrop 1$E_E105 INT N02361 lshift 0 1$E_E106 INT N02418 lshift 0 -1C_C2 0 OUT 0.7p L_L1 N02855 OUT 1nV_V102 ddrop 0 0.53.ends THS3095 .subckt SCHEMATIC1_F1 1 2 3 4 F_F1 3 4 VF_F1 1VF_F1 1 2 0Va.ends SCHEMATIC1_F1 .subckt SCHEMATIC1_F2 1 2 3 4 F_F2 3 4 VF_F2 1VF_F2 1 2 0V.ends SCHEMATIC1_F2inpinnoutvccveerefpdBnx vccT_04F67B0820090817160803 NOPCB (J)Bnx`veeT_049909C420090817160803 NOPCB (J)Bn0In+T_04F780E420090817160803 NOPCB (J)Bm`pdT_0555B00420090817161556 NOPCB (J)BnrefT_0555A77420090817161556 NOPCB (J)Bn`refT_055949DC20090817161645 NOPCB (J)BnP veeT_058B5BF820090817161650 NOPCB (J)Bm`PpdT_0484A53420090817161718 NOPCB (J)BnPhvccT_050B647420090817161723 NOPCB (J)Bn(@In+T_059D241020090817161746 NOPCB (J)Bf`T_04F8A49420090817160803 NOPCB (GND)Bf0HT_04F7AD2420090817160803 NOPCB (GND)BfpT_055405BC20090817161516 NOPCB (GND)Bf8T_0454F39420090817161518 NOPCB (GND)Bf`HT_0555A2D420090817161556 NOPCB (GND)BfHT_055599C420090817161556 NOPCB (GND)8? ]@ư>?ư>'dd?Y@[dddd$@$@.AeA.AeAMbP?@@?w !>ư> $ 4@D@ =B?& .>??ư>ư>ư>ư>ư>ư>?I@?I@?I@& .>#;@& .>-q=ư>MbP?-q=MbP?vIh%<=@@D@& .>?MbP?4@?{Gz?ꌠ9Y>)F,@?+= _BKH9$@Y@#B ;ư>?.AMbP??????I@?Xd I@nMbP?{Gz?{Gz?MbP????|=Hz>}Ô%ITNoname