SBVA100 December 2022 LP2992 , TPS786 , TPS7A30 , TPS7A3001-EP , TPS7A33 , TPS7A39 , TPS7A4501-SP , TPS7A47 , TPS7A47-Q1 , TPS7A4701-EP , TPS7A49 , TPS7A52 , TPS7A52-Q1 , TPS7A53 , TPS7A53-Q1 , TPS7A53A-Q1 , TPS7A53B , TPS7A54 , TPS7A54-Q1 , TPS7A57 , TPS7A7100 , TPS7A7200 , TPS7A7300 , TPS7A80 , TPS7A8300 , TPS7A83A , TPS7A84 , TPS7A84A , TPS7A85 , TPS7A85A , TPS7A87 , TPS7A89 , TPS7A90 , TPS7A91 , TPS7A92 , TPS7A94 , TPS7A96 , TPS7B7702-Q1 , TPS7H1111-SEP , TPS7H1111-SP , TPS7H1210-SEP
Low-dropout regulators (LDO) are required in many applications because compared to switching converters they are inherently low noise while maintaining a low cost and simple solution. In applications where board space and output voltage tolerance are both at a premium, LDOs present a compelling design choice over switching converters as the later will often need large magnetics or capacitor banks to filter out the ripple voltage. Unfortunately using a single LDO for the supply is not always possible and it is now common to see engineers place 5-10 LDO’s in parallel. Designers need a method to determine how many parallel LDO's are required to meet not just the system load current and load voltage, but thermals, system noise, and system PSRR requirements as well. This paper presents a method to calculate the optimum ballast resistance and minimum number of parallel LDO’s required to meet a series of system requirements.