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SLVS806D April 2009 – December 2015 TPS61240 , TPS61241

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

YFF|6
- MXBG078Z

散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾ ⁽²⁾

		MIN	MAX	UNIT
V_I	Input voltage on V_IN, L, EN	–0.3	7	V
	Voltage on V_OUT	–2.0	7	V
	Voltage on FB	–2.0	14	V
	Peak output current	Internally limited		A
T_J	Maximum operating junction temperature	–40	125	°C
T_stg	Storage temperature	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.

(2) The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin.

7.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge⁽²⁾	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±4000	V
		Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500
		Machine model (MM)	±200

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 250-V CDM is possible with the necessary precautions.

7.3 Recommended Operating Conditions

			MIN	NOM	MAX	UNIT
V_IN	Input voltage range		2.3		5.5	V
L	Inductance		0.4	1	1.5	µH
C_O	Output capacitance	TPS61240 TPS61241	1		20	µF
C_O	Output capacitance	TPS61242	0.8		10	µF
T_A	Operating ambient temperature		–40		85	°C
T_J	Operating junction temperature		–40		125	°C

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS6124x		UNIT
		YFF	DRV
		6 PINS	6 PINS
R_θJA	Junction-to-ambient thermal resistance	132.7	104.1	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	1.2	97.1
R_θJB	Junction-to-board thermal resistance	22.4	74.0
ψ_JT	Junction-to-top characterization parameter	5.2	4.5
ψ_JB	Junction-to-board characterization parameter	22.4	74.4
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	—	48.4

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

Over full operating ambient temperature range, typical values are at T_A = 25°C. Unless otherwise noted, specifications apply for condition V_IN = EN = 3.6V. External components C_IN = 2.2μF, C_OUT = 4.7μF 0603, L = 1μH, refer to Parameter Measurement Information section.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
DC-DC STAGE
V_IN	Input voltage range		2.3		5.5	V
V_OUT	Fixed output voltage range	2.3 V ≤ V_IN ≤ 5.5 V, 0 mA ≤ I_OUT ≤ 200 mA	4.9	5.0	5.1	V
V_{O_Ripple}	Ripple voltage, PWM mode	I_LOAD = 150 mA			20	mVpp
I_SW	Output current	V_IN 2.3 V to 5.5 V	200			mA
	Switch valley current limit	V_OUT = V_GS = 5.0 V (TPS61240)	500	600		mA
	Switch valley current limit	V_OUT = V_GS = 5.0 V (TPS61241, TPS61242)	600	700		mA
	Short circuit current	V_OUT = V_GS = 5.0 V	200	350		mApk
	High side MOSFET on-resistance⁽¹⁾	V_IN = V_GS = 5.0 V, T_A = 25°C⁽¹⁾		290		mΩ
	Low Side MOSFET on-resistance⁽¹⁾	V_IN = V_GS = 5.0 V, T_A = 25°C ⁽¹⁾		250		mΩ
	Operating quiescent current	I_OUT = 0 mA, Power save mode		30	40	μA
	Shutdown current	EN = GND			1.5	μA
	Reverse leakage current V_OUT	EN = 0, V_OUT = 5 V			2.5	μA
	Leakage current from battery to V_OUT	EN = GND			2.5	μA
	Line transient response	V_IN 600 mVp-p AC square wave, 200 Hz, 12.5% DC at 50/200 mA load		±25	±50	mVpk
	Load transient response	0–50 mA, 50–0 mA V_IN = 3.6V T_Rise = T_Fall = 0.1 μs		50		mVpk
	Load transient response	50–200 mA, 200–50 mA, V_IN = 3.6 V, T_Rise = T_Fall = 0.1 μs		150		mVpk
I_IN	Input bias current, EN	EN = GND or V_IN		0.01	1.0	μA
V_UVLO	Undervoltage lockout threshold	Falling		2.0	2.1	V
V_UVLO	Undervoltage lockout threshold	Rising		2.1	2.2	V
CONTROL STAGE
V_IH	High level input voltage threshold, EN	2.3 V ≤ V_IN ≤ 5.5 V			1.0	V
V_IL	Low level input voltage threshold, EN	2.3 V ≤ V_IN ≤ 5.5 V	0.4			V
OVC	Input overvoltage threshold	Falling		5.9		V
OVC	Input overvoltage threshold	Rising		6.0		V
t_Start	Start-up time	Time from active EN to start switching, no-load until V_OUT is stable 5 V			300	μs
DC-DC STAGE
ƒ		See Figure 7 (Frequency Dependancy vs I_OUT)		3.5		MHz
T_SD	Thermal shutdown	Increasing junction temperature		140		°C
T_SD	Thermal shutdown hysteresis	Decreasing junction temperature		20		°C

(1) DRV package has an increased R_DSon of about 40mΩ due to bond wire resistance.

7.6 Typical Characteristics

7.6.1 Table of Graphs

		Figure
Maximum Output Current	vs Input Voltage	Figure 1
Efficiency	vs Output Current, V_out = 5V, V_in = [2.3 V; 3.0 V; 3.6 V; 4.2 V]	Figure 2
Efficiency	vs Input Voltage, V_out = 5 V, I_out = [100 µA; 1 mA; 10 mA; 100 mA; 200 mA]	Figure 3
Input Current	at No Output Load, Device Disabled	Figure 4
Output Voltage	vs Output Current, V_out = 5 V, V_in = [2.3 V; 3.0 V; 3.6 V; 4.2 V]	Figure 5
Output Voltage	vs Input Voltage	Figure 6
Frequency	vs Output Load, V_out = 5 V, V_in = [3.0 V; 4.0 V; 5.0 V]	Figure 7

Figure 1. Maximum Output Current vs Input Voltage

Figure 3. Efficiency vs Input Voltage

Figure 5. Output Voltage vs Output Current

Figure 7. Frequency vs Output Load

Figure 2. Efficiency vs Output Current

Figure 4. Input at No Output Load

Figure 6. Output Voltage vs Input Voltage