ZHCSCJ3D June 2014 – October 2017 TPS25942A , TPS25942L , TPS25944A , TPS25944L
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用范圍
- 3 說明
- 4 修訂歷史記錄
- 5 Device Comparison Table
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Parameter Measurement Information
-
9 Detailed Description
- 9.1 Overview
- 9.2 Functional Block Diagram
- 9.3
Feature Description
- 9.3.1 Enable and Adjusting Undervoltage Lockout
- 9.3.2 Overvoltage Protection (OVP)
- 9.3.3 Hot Plug-In and In-Rush Current Control
- 9.3.4 Overload and Short Circuit Protection
- 9.3.5 Reverse Current Protection
- 9.3.6 FAULT Response
- 9.3.7 Current Monitoring
- 9.3.8 Power Good Comparator
- 9.3.9 IN, OUT and GND Pins
- 9.3.10 Thermal Shutdown
- 9.4 Device Functional Modes
-
10Application and Implementation
- 10.1 Application Information
- 10.2
Typical Application
- 10.2.1 Design Requirements
- 10.2.2
Detailed Design Procedure
- 10.2.2.1 Step by Step Design Procedure
- 10.2.2.2 Programming the Current-Limit Threshold: R(ILIM) Selection
- 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
- 10.2.2.4 Programming Current Monitoring Resistor—RIMON
- 10.2.2.5 Setting Output Voltage Ramp Time (tdVdT)
- 10.2.2.6 Programing the Power Good Set Point
- 10.2.2.7 Support Component Selections—R6, R7 and CIN
- 10.2.3 Application Curves
- 10.3 System Examples
- 11Power Supply Recommendations
- 12Layout
- 13器件和文檔支持
- 14機(jī)械、封裝和可訂購信息
封裝選項
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RVC|20
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RVC|20
訂購信息
6 Pin Configuration and Functions
Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NO. | NAME | ||
| 1 | DMODE | I | Diode Mode control pin. A high at this pin activates the non-ideal diode mode |
| 2 | PGOOD | O | Active High. A high indicates PGTH has crossed the threshold value. It is an open drain output |
| 3 | PGTH | I | Positive input of PGOOD comparator |
| 4 | OUT | O | Power output of the device |
| 5 | |||
| 6 | |||
| 7 | |||
| 8 | |||
| 9 | IN | I | Power input and supply voltage |
| 10 | |||
| 11 | |||
| 12 | |||
| 13 | |||
| 14 | EN/UVLO | I | Input for setting programmable undervoltage lockout threshold. An undervoltage event opens internal FET and assert FLT to indicate power-failure. When pulled to GND, resets the fault latch in TPS25942L, TPS25944L |
| 15 | OVP | I | Input for setting programmable overvoltage protection threshold. An overvoltage event opens the internal FET and assert FLT to indicate overvoltage |
| 16 | GND | — | Ground |
| 17 | ILIM | I/O | A resistor from this pin to GND sets the overload and short-circuit current limit |
| 18 | dVdT | I/O | A capacitor from this pin to GND sets the ramp rate of output voltage |
| 19 | IMON | O | This pin sources a scaled down ratio of current through the internal FET. A resistor from this pin to GND converts current to proportional voltage, used as analog current monitor |
| 20 | FLT | O | Fault event indicator, goes low to indicate fault condition due to undervoltage, pvervoltage, reverse voltage, circuit breaker timeout (TPS25944 only) and thermal shutdown events. It is an open drain output |
| — | PowerPADTM | — | The GND terminal must be connected to the exposed PowerPAD. This PowerPAD must be connected to a PCB ground plane using multiple vias for good thermal performance |