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ZHCSEG0B November 2015 – April 2017 TMP275-Q1

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

D|8
- MSOI002K
DGK|8
- MPDS028E

散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

	MIN	MAX	UNIT
Power supply, V+		7	V
Input voltage⁽²⁾	–0.5	7	V
Input current		10	mA
Operating temperature	–55	127	°C
Junction temperature, T_J max		150	°C
Storage temperature, T_stg	–60	130	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Input voltage rating applies to all TMP275-Q1 input voltages.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾	±2500	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per AEC Q100-011	±1000	V

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

	MIN	NOM	MAX	UNIT
Supply voltage	2.7		5.5	V
Operating free-air temperature, T_A	–40		125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TMP275-Q1		UNIT
		D (SOIC)	DGK (VSSOP)
		8 PINS	8 PINS
R_θJA	Junction-to-ambient thermal resistance	121.6	185	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	70.5	76.1	°C/W
R_θJB	Junction-to-board thermal resistance	62	106.4	°C/W
ψ_JT	Junction-to-top characterization parameter	23	14.1	°C/W
ψ_JB	Junction-to-board characterization parameter	61.5	104.8	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

at T_A = –40°C to +125°C and V+ = 2.7 V to 5.5 V (unless otherwise noted)

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
TEMPERATURE INPUT
	Range			–40		125	°C
	Accuracy (temperature error)		–10°C to 85°C, V+ = 3.3 V		±0.125	±0.75	°C
			0°C to 100°C, V+ = 3 V to 3.6 V		±0.125	±1
			–40°C to 125°C, V+ = 3 V to 3.6 V		±0.125	±1.5
			25°C to 100°C, V+ = 3.3 V to 5.5 V		±0.2	±2
	Resolution⁽¹⁾		Selectable		0.0625		°C
DIGITAL INPUT/OUTPUT
	Input capacitance				3		pF
V_IH	High-level input logic			0.7 (V+)		6	V
V_IL	Low-level input logic			–0.5		0.3 (V+)	V
I_IN	Leakage input current		0 V ≤ V_IN ≤ 6 V			1	µA
	Input voltage hysteresis		SCL and SDA pins		500		mV
V_OL	Low-level output logic	SDA	I_OL = 3 mA	0	0.15	0.4	V
V_OL	Low-level output logic	ALERT	I_OL = 4 mA	0	0.15	0.4	V
	Resolution		Selectable		9 to 12		Bits
	Conversion time		9 bits		27.5	37.5	ms
			10 bits		55	75
			11 bits		110	150
			12 bits		220	300
	Time-out time			25	54	74	ms
POWER SUPPLY
	Operating range			2.7		5.5	V
I_Q	Quiescent current		Serial bus inactive		50	85	µA
			Serial bus active, SCL frequency = 400 kHz		100
			Serial bus active, SCL frequency = 3.4 MHz		410
I_SD	Shutdown current		Serial bus inactive		0.1	3	µA
			Serial bus active, SCL frequency = 400 kHz		60
			Serial bus active, SCL frequency = 3.4 MHz		380
TEMPERATURE RANGE
	Specified range			–40		125	°C
	Operating range			–55		127	°C

(1) Specified for 12-bit resolution.

6.6 Timing Requirements

see the Timing Diagrams section for timing diagrams⁽¹⁾

			FAST MODE		HIGH-SPEED MODE		UNIT
			MIN	MAX	MIN	MAX	UNIT
ƒ_(SCL)	SCL operating frequency	V+	0.001	0.4	0.001	2.38	MHz
t_(BUF)	Bus-free time between STOP and START condition	See the Timing Diagrams section	1300		160		ns
t_(HDSTA)	Hold time after repeated START condition. After this period, the first clock is generated.		600		160		ns
t_(SUSTA)	repeated start condition setup time		600		160		ns
t_(SUSTO)	STOP condition setup time		600		160		ns
t_(HDDAT)	Data hold time		4	900	4	120	ns
t_(SUDAT)	Data setup time		100		10		ns
t_(LOW)	SCL-clock low period	V+ , see the Timing Diagrams section	1300		280		ns
t_(HIGH)	SCL-clock high period	See the Timing Diagrams section	600		60		ns
t_FD	Data fall time	See the Timing Diagrams section		300		150	ns
t_RC	Clock rise time	See the Two-Wire Timing Diagrams section		300		40	ns
t_RC	Clock rise time	SCLK ≤ 100 kHz, see the Timing Diagrams section		1000			ns
t_FC	Clock fall time	See the Two-Wire Timing Diagrams section		300		40	ns

(1) Values are based on a statistical analysis of a one-time sample of devices. Minimum and maximum values are not specified and are not production tested.

6.7 Typical Characteristics

at T_A = 25°C and V+ = 5 V (unless otherwise noted)

Serial bus inactive

Figure 1. Quiescent Current vs Temperature

12-bit resolution

Figure 3. Conversion Time vs Temperature

TMP275-Q1 tc_iq_bus_active-tmp_sbos760.gif

Figure 5. Quiescent Current with Bus Activity
vs Temperature

Figure 2. Shutdown Current vs Temperature

Figure 4. Temperature Error vs Temperature

Figure 6. Temperature Error at 25°C