ZHCSJK4G June 2009 – March 2021 PCA9548A
PRODUCTION DATA
- 1 特性
- 2 應用
- 3 說明
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Application Information Disclaimer
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- RGE|24
訂購信息
9.2.2 Detailed Design Procedure
Once all the slaves are assigned to the appropriate slave channels and bus voltages are identified, the pull-up resistors, Rp, for each of the buses need to be selected appropriately. The minimum pull-up resistance is a function of the reference voltage of the specific I2C channel (VDPUX), VOL,(max), and IOL as shown in Equation 1.
The maximum pull-up resistance is a function of the maximum rise time, tr (300 ns for fast-mode operation, fSCL = 400 kHz) and bus capacitance, Cbis given by Equation 2.
The maximum bus capacitance for an I2C bus must not exceed 400 pF for fast-mode operation. The bus capacitance can be approximated by adding the capacitance of the PCA9548A, Cio(OFF), the capacitance of wires, connections, traces, and the capacitance of each individual slave on a given channel. If multiple channels are activated simultaneously, each of the slaves on all channels contribute to total bus capacitance.