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SNCS104D April 2005 – December 2014 LMH6570

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

D|8
- MSOI002K

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購信息

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾⁽¹⁾

		MIN	MAX	UNIT
Supply Voltage (V⁺ − V⁻)			13.2	V
I_OUT⁽³⁾			130	mA
Signal & Logic Input Pin Voltage			±(V_S + 0.6)	V
Signal & Logic Input Pin Current			±20	mA
Maximum Junction Temperature			+150	°C
Storage Temperature		−65	+150	°C
Soldering Information	Infrared or Convection (20 sec)		235	°C
Soldering Information	Wave Soldering (10 sec)		260	°C

(1) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Machine model (MM)⁽²⁾	±200	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with less than 500-V HBM is possible with the necessary precautions. Pins listed as ±2000 V may actually have higher performance. Human body model, 1.5kΩ in series with 100 pF.

(2) Machine model, 0 Ω In series with 200 pF

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	NOM	MAX	UNIT
Operating Temperature		−40		85	°C
Supply Voltage		6		12	V

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		D	UNIT
THERMAL METRIC⁽¹⁾		8 PINS	UNIT
R_θJA	Junction-to-ambient thermal resistance	150	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	50	°C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics ±5V

V_S = ±5 V, R_L = 100 Ω, R_F = 576 Ω, A_V = 2 V/V, T_J = 25 °C, unless otherwise specified.

	PARAMETER	TEST CONDITIONS⁽²⁾		MIN⁽⁴⁾	TYP⁽⁸⁾	MAX⁽⁴⁾	UNIT
FREQUENCY DOMAIN PERFORMANCE
SSBW	−3 dB Bandwidth	V_OUT = 0.5 V_PP			500		MHz
LSBW	–3 dB Bandwidth	V_OUT = 2 V_PP⁽⁵⁾			400		MHz
.1 dBBW	0.1 dB Bandwidth	V_OUT = 0.25 V_PP			150		MHz
DG	Differential gain	R_L = 150 Ω, f = 4.43 MHz			0.02%
DP	Differential phase	R_L = 150 Ω, f = 4.43 MHz			0.05		deg
XTLK	Channel to channel crosstalk	All Hostile, f = 5 MHz			−70		dBc
TIME DOMAIN RESPONSE
T_RS	Channel to channel switching time	Logic transition to 90% output			8		ns
	Enable and disable times	Logic transition to 90% or 10% output.			10		ns
T_RL	Rise and fall time	4 V Step			2.4		ns
T_SS	Settling time to 0.05%	2 V Step			17		ns
OS	Overshoot	2 V Step			5%
SR	Slew rate	4 V Step⁽⁵⁾⁽⁷⁾			2200		V/μs
DISTORTION
HD2	2^ndHarmonic distortion	2 V_PP , 5 MHz			−68		dBc
HD3	3^rd Harmonic distortion	2 V_PP , 5 MHz			−84		dBc
IMD	3^rd Order intermodulation products	10 MHz, Two tones 2 Vpp at output			−80		dBc
EQUIVALENT INPUT NOISE
VN	Voltage	>1 MHz, Input Referred			5		nV√HZ
ICN	Current	>1 MHz, Input Referred			5		pA/√Hz
STATIC, DC PERFORMANCE
CHGM	Channel to channel gain difference	DC, Difference in gain between channels			±0.005%	±0.034%
CHGM	Channel to channel gain difference	DC, Difference in gain between channels	-40°C ≤ T_J ≤ 85°C			±0.036%
V_IO	Input offset voltage	V_IN = 0 V			1	±15	mV
V_IO	Input offset voltage	V_IN = 0 V	-40°C ≤ T_J ≤ 85°C			±21	mV
DVIO	Offset voltage drift⁽⁹⁾				30		µV/°C
IBN	Input bias current⁽⁶⁾	V_IN = 0 V			−3	±8	µA
IBN	Input bias current⁽⁶⁾	V_IN = 0 V	-40°C ≤ T_J ≤ 85°C			±10	µA
DIBN	Bias current drift⁽⁹⁾				11		nA/°C
I_BI	Inverting input bias current⁽⁶⁾	Pin 8, Feedback point, V_IN = 0 V			−3	±18	uA
I_BI	Inverting input bias current⁽⁶⁾	Pin 8, Feedback point, V_IN = 0 V	-40°C ≤ T_J ≤ 85°C			±22	uA
PSRR	Power supply rejection ratio	DC, Input referred		48	50		dB
PSRR	Power supply rejection ratio	DC, Input referred	-40°C ≤ T_J ≤ 85°C	46			dB
ICC	Supply current	No Load, Shutdown Pin (SD) > 0.8 V			13.8	15	mA
ICC	Supply current	No Load, Shutdown Pin (SD) > 0.8 V	-40°C ≤ T_J ≤ 85°C			16	mA
	Supply current shutdown	Shutdown Pin (SD) > 2 V			1.1	1.3	mA
	Supply current shutdown	Shutdown Pin (SD) > 2 V	-40°C ≤ T_J ≤ 85°C			1.4	mA
V_IH	Logic high threshold	Select Pin & Shutdown pin (SEL, SD)		2.0			V
V_IL	Logic low threshold	Select Pin & Shutdown pin (SEL, SD)				0.8	V
I_iL	Logic pin input current low⁽⁶⁾	Logic Input = 0 V Select Pin & Shutdown Pin (SEL, SD)		−8	−1		µA
I_iL	Logic pin input current low⁽⁶⁾	Logic Input = 0 V Select Pin & Shutdown Pin (SEL, SD)	-40°C ≤ T_J ≤ 85°C	-10			µA
I_iH	Logic pin input current high⁽⁶⁾	Logic Input = 5.0 V, Select Pin & Shutdown Pin (SEL, SD)			57	68	µA
I_iH	Logic pin input current high⁽⁶⁾	Logic Input = 5.0 V, Select Pin & Shutdown Pin (SEL, SD)	-40°C ≤ T_J ≤ 85°C			75	µA
MISCELLANEOUS PERFORMANCE
RIN+	Input resistance				5		kΩ
CIN	Input capacitance				0.8		pF
R_OUT	Output resistance	Output Active, (SD < 0.8 V)			0.04		Ω
R_OUT	Output resistance	Output Disabled, (SD > 2 V)			3000		Ω
C_OUT	Output capacitance	Output Disabled, (SD > 2 V)			3.1		pF
V_O	Output voltage range	No Load		±3.51	±3.7		V
V_O		No Load	-40°C ≤ T_J ≤ 85°C	±3.50			V
V_OL		R_L = 100 Ω		±3.16	±3.5		V
V_OL		R_L = 100 Ω	-40°C ≤ T_J ≤ 85°C	±3.15			V
CMIR	Input voltage range			±2.5	±2.6		V
I_O	Linear output current⁽⁶⁾	V_IN = 0 V		+60	±80		mA
				-70
			-40°C ≤ T_J ≤ 85°C	±55
I_SC	Short circuit current⁽³⁾	V_IN = ±2 V, Output shorted to ground			±230		mA

6.6 Electrical Characteristics ±3.3V

V_S = ±3.3 V, R_L = 100 Ω, R_F = 576 Ω, A_V = 2 V/V, unless otherwise specified.

	PARAMETER	TEST CONDITIONS⁽²⁾	TYP⁽⁸⁾	UNIT
FREQUENCY DOMAIN PERFORMANCE
SSBW	−3 dB Bandwidth	V_OUT = 0.5 V_PP	475	MHz
LSBW	−3 dB Bandwidth	V_OUT = 2.0 V_PP	375	MHz
0.1 dBBW	0.1 dB Bandwidth	V_OUT = 0.5 V_PP	100	MHz
GFP	Peaking	DC to 200 MHz	0.4	dB
XTLK	Channel to channel crosstalk	All Hostile, f = 5 MHz	−70	dBc
TIME DOMAIN RESPONSE
T_RL	Rise and Fall time	2 V Step	2	ns
T_SS	Settling time to 0.05%	2 V Step	20	ns
OS	Overshoot	2 V Step	5%
SR	Slew rate	2 V Step	1400	V/μs
DISTORTION
HD2	2^nd Harmonic distortion	2 V_PP, 10 MHz	−67	dBc
HD3	3^rd Harmonic distortion	2 V_PP, 10 MHz	−87	dBc
STATIC, DC PERFORMANCE
V_IO	Input offset voltage	V_IN = 0 V	1	mV
IBN	Input bias current⁽⁶⁾	V_IN = 0 V	-3	μA
PSRR	Power supply rejection ratio	DC, Input Referred	49	dB
ICC	Supply current	No Load	12.5	mA
V_IH	Logic high threshold	Select Pin & Shutdown pin (SEL, SD), V_IH ? V⁺ * 0.4	1.3	V
V_IL	Logic low threshold	Select Pin & Shutdown pin (SEL, SD), V_IL ? V⁺ * 0.12	0.4	V
MISCELLANEOUS PERFORMANCE
R_IN+	Input resistance		5	kΩ
C_IN	Input capacitance		0.8	pF
R_OUT	Output resistance		0.06	Ω
V_O	Output voltage range	No Load	±2	V
V_OL	Output voltage range	R_L = 100 Ω	±1.8	V
CMIR	Input voltage range		±1.2	V
I_O	Linear output current⁽³⁾	V_IN = 0 V	±60	mA
I_SC	Short circuit current⁽³⁾	V_IN = ±1 V, Output shorted to ground	±150	mA

(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For specifications, see the Electrical Characteristics tables.

(2) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T_J = T_A. No specification of parametric performance is indicated in the electrical tables under conditions of internal self heating where T_J > T_A. See Thermal Information for information on temperature de-rating of this device. Min/Max ratings are based on product testing, characterization and simulation. Individual parameters are tested as noted.

(3) The maximum output current (I_OUT) is determined by the device power dissipation limitations (The junction temperature cannot be allowed to exceed 150°C). See Power Dissipation for more details. A short circuit condition should be limited to 5 seconds or less.

(4) Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlation using Statistical Quality Control (SQC) methods.

(5) Parameter ensured by design.

(6) Positive Value is current into device.

(7) Slew Rate is the average of the rising and falling edges.

(8) Typical numbers are the most likely parametric norm.

(9) Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.