SNVS424D January 2006 – December 2014 LM5106
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Detailed Description
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11Device and Documentation Support
- 12Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
8.1 Application Information
The LM5106 is one of the latest generation of high-voltage gate drivers which are designed to drive both the high-side and low-side N-channel MOSFETs in a half-bridge/full bridge configuration or in a synchronous buck circuit. The floating high-side driver can operate with supply voltages up to 110 V. This allows for N-channel MOSFET control in half-bridge, full-bridge, push-pull, two switch forward and active clamp topologies.
The outputs of the LM5106 are controlled from a single input. The rising edge of each output can be delayed with a programming resistor.
Table 1. Highlights
| FEATURE | BENEFIT |
|---|---|
| Programmable Turnon Delay | Allows optimization of gate drive timings in bridge topologies |
| Enable Pin | Reduces operating current when disabled to improved power system standby power |
| Low Power Consumption | Improves light load efficiency figures of the power stage. |
8.2 Typical Application
8.2.1 Design Requirements
| PARAMETERS | VALUES |
|---|---|
| Gate Drive IC | LM5102 |
| Mosfet | CSD18531Q5A |
| VDD | 10 V |
| Qgmax | 43 nC |
| Fsw | 100 kHz |
| DMax | 95% |
| IHBO | 10 µA |
| VDH | 1.1 V |
| VHBR | 7.3 V |
| VHBH | 0.4 V |
8.2.2 Detailed Design Procedure
8.2.2.1 Detailed Design Procedure
where
- VDD = Supply voltage of the gate drive IC
- VDH = Bootstrap diode forward voltage drop
- Vgsmin = Minimum gate source threshold voltage
The quiescent current of the bootstrap circuit is 10 µA which is negligible compared to the Qgs of the MOSFET.
In practice the value for the CBOOT capacitor should be greater than that calculated to allow for situations where the power stage may skip pulse due to load transients. In this circumstance the boot capacitor must maintain the HB pin voltage above the UVLO voltage for the HB circuit.
As a general rule the local VDD bypass capacitor should be 10 times greater than the value of CBOOT.
The bootstrap and bias capacitors should be ceramic types with X7R dielectric. The voltage rating should be twice that of the maximum VDD to allow for loss of capacitance once the devices have a DC bias voltage across them and to ensure long-term reliability of the devices.
The resistor values, RT, for setting turnon delay can be found in Figure 19.
8.2.3 Application Curves
Figure 18. LM5106 Enable: tsd
Figure 19. Dead-Time vs RT Resistor Value