|
MIN |
NOM |
MAX |
UNIT |
| VCC |
Supply voltage |
2 |
5 |
6 |
V |
| VIH |
High-level input voltage |
VCC = 2V |
1.5 |
|
|
V |
| VCC = 4.5V |
3.15 |
|
|
| VCC = 6V |
4.2 |
|
|
| VIL |
Low-level input voltage |
VCC = 2V |
|
|
0.5 |
V |
| VCC = 4.5V |
|
|
1.35 |
| VCC = 6V |
|
|
1.8 |
| VI |
Input voltage |
0 |
|
VCC |
V |
| VO |
Output voltage |
0 |
|
VCC |
V |
| tt(2) |
Input transition rise and fall time |
VCC = 2V |
|
|
1000 |
ns |
| VCC = 4.5V |
|
|
500 |
| VCC = 6V |
|
|
400 |
| TA |
Operating free-air temperature |
-55 |
|
125 |
°C |
(1) All unused inputs of the device
must be held at V
CC or GND to ensure proper device operation. Refer
to the TI application report,
Implications of Slow or Floating CMOS
Inputs, literature number
SCBA004.
(2) If this device is used in the
threshold region (from VILmax = 0.5 V to VIHmin = 1.5 V),
there is a potential to go into the wrong state from induced grounding, causing
double clocking. Operating with the inputs at tt = 1000 ns and
VCC = 2 V does not damage the device; however, functionally, the
CLK inputs are not ensured while in the shift, count, or toggle operating
modes.