ZHCSUL6 February 2024 ADC12DL1500 , ADC12DL2500 , ADC12DL500
PRODUCTION DATA
Figure 7-12 to Figure 7-14 provide examples of the critical traces routed on the device evaluation module (EVM). Figure 7-15 provides an example printed circuit board (PCB) layer stackup.
Figure 7-12 Top Layer Routing: Analog Inputs, CLK and SYSREF, DA0-3, DB0-3
Figure 7-13 GND1 Cutouts to Optimize Impedance of Component Pads
Figure 7-14 Bottom Layer Routing: Additional CLK Routing, DA4-7, DB4-7
Figure 7-15 Example PCB Stackup